Plasma implantation of impurities in junction region recesses

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S300000, C438S369000, C438S514000, C257SE21473

Reexamination Certificate

active

07314804

ABSTRACT:
A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon impurities may be implanted by plasma immersion ion implantation in junction recesses to reduce boron diffusion and current leakage from boron doped junction region material deposited in the junction recesses. This may be accomplished by removing, such as by etching, portions of a substrate adjacent to a gate electrode to form junction recesses. The junction recesses may then be conformally implanted with a depth of arsenic and carbon impurities using plasma immersion ion implantation. After impurity implantation, boron doped silicon germanium can be formed in the junction recesses.

REFERENCES:
patent: 6872626 (2005-03-01), Cheng
patent: 2002/0190284 (2002-12-01), Murthy et al.
patent: 2004/0173815 (2004-09-01), Yeo et al.

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