Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-08-31
2003-02-25
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S253000, C438S396000, C438S618000, C438S626000, C438S631000, C438S642000, C438S645000
Reexamination Certificate
active
06524912
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the fabrication of semiconductive devices, and more particularly, to a method of forming conductive material in an opening in a semiconductive device. The invention also relates to the structures formed according to the various embodiments of the method herein set forth.
BACKGROUND OF THE INVENTION
In the fabrication of integrated circuits, various layers, e.g. conductive layers and insulative layers, are formed. For example, during the formation of semiconductive devices, such as dynamic random access memories (DRAMs), insulating layers are used to electrically separate conductive layers such as doped polycrystalline silicon, aluminum, metal silicides, etc. It is often required that the conductive layers be interconnected through holes or openings in the insulating layers. Such openings are commonly referred to as contact holes, e.g. when the opening extends through an insulating layer to an active area, or vias, e.g. when the opening extends through an insulating layer between two conductive layers. The profile of an opening is of particular importance such that specific characteristics can be achieved when a contact hole or via is provided and then filled with one or more conductive materials.
Conductive materials are also formed in openings when providing certain storage cell capacitors for use in semiconductive devices, e.g. DRAMs. Storage capacity and size are important characteristics of a storage cell. Generally, a storage cell is formed with a dielectric constant material interposed between two conductive electrodes. One or more layers of various conductive materials may be used as the electrode material.
Container-type cell capacitor structures generally include the formation of an insulative layer over existing topography which has been formed over a substrate, and then openings are etched into the insulative layer. These openings allow access to the underlying topography, e.g. for a cell capacitor, which may include conductive regions, e.g. conductive plugs, active substrate regions, etc. Thereafter, a conductive layer to be used for forming the bottom electrode of the cell capacitor is formed within the openings, and may also be formed on the upper surface of the insulative layer as well. A layer of oxide material may then be used to fill the opening over the conductive material. Thereafter, this oxide material is removed to expose the layer of conductive material. The exposed layers of conductive material which are outside of the opening, e.g. which are over the top surface of the insulative layer, are then removed to separate neighboring conductive openings, thereby forming individual containers with exposed insulative material between them. Next, the oxide material still filling the conductive opening is removed, leaving the opening lined with a bottom electrode for use in forming the container-type cell capacitor.
Storage capacity and size are important characteristics in a storage cell. One way to retain the storage capacity of a device and decrease its size is to increase the dielectric constant of the dielectric layer of the storage cell capacitor. Therefore, preferably a high dielectric constant material is utilized in applications interposed between two electrodes. Many conductive metals such as platinum, rhodium, iridium, osmium, as well as other Group VIII metals, and other transition element metals, e.g. copper, silver and gold, and Group IIIa and IVa metals, e.g. aluminum, and their alloys are desirable electrode materials for such high dielectric constant capacitors.
However, many of the foregoing metals, e.g. Group VIII metals such as platinum or platinum alloys such as platinum-rhodium, are not easily planarized. An illustrative planarization problem is shown in FIG.
1
A.
FIG. 1A
shows a cross-sectional portion of a semiconductive device
10
. An insulative layer
12
is formed over a substrate
11
. An opening
15
is formed in the insulative layer
12
which stops on the surface of the substrate
11
. To form a lower electrode or bottom electrode of a capacitor-type structure, a metal layer
20
is formed over the insulative layer and as a lining in opening
15
. Thereafter, a photoresist layer
25
is formed over the metal layer
25
to completely fill the opening
15
. Upon planarization, the upper portion of layer
25
is removed along with the metal portion
20
which is outside of the opening
15
, resulting in the non-dashed lining portion
30
. However, as shown in
FIG. 1A
, the metal is often deformed or smeared at the upper region or edge of the opening
15
. The metal material is pushed into the center of the container opening
15
as represented by projection
35
during the planarization process. Such deformation of the metal in the container opening
15
produces an undesirable profile and is further problematic in removing the resist material
25
from within the opening
15
.
As shown in
FIG. 1B
, a further problem associated with the use of a metal is shown wherein the metal layer
25
is not planarized, but instead is etched. However, upon wet etching the metal layer
25
back to the insulative layer
12
, the photoresist layer
25
is pulled back away from the metal layer, thereby allowing for undesirable removal of portions of the metal layer as shown by the undesirably etched regions
40
in FIG.
1
B.
Thus, there exists a need in the art for a new method of forming conductive material in openings in semiconductive devices. There is also a need for better structures containing conductive material formed therein.
SUMMARY OF THE INVENTION
In accordance with the invention, there is set forth a method of providing a conductive material in an opening. The process involves first forming a conductive material in the opening and over at least a portion of the insulative material which is outside of the opening. Next, a metal-containing fill material is formed over at least a portion of the conductive material such that at least some of the metal-containing material is located in the opening. At least a portion of the conductive material outside of the opening is then removed. Thereafter, at least a portion of the metal-containing fill material which is inside the opening is then removed.
The invention further provides a method of forming a bottom electrode of a capacitor. A second conductive material is provided within an opening in contact the first conductive material. The second conductive material is also provided over at least a portion of an insulative material which is outside of the opening. Next, a metal-containing fill material is provided over at least a portion of the conductive material which is inside the opening and which is over the insulative layer as well. At least a portion of the metal-containing fill material which is inside the opening is next removed and the second conductive material thereby forms the bottom electrode of a capacitor.
Also included is a method of providing a conductive material in an opening which has been provided in an insulative material over a substrate, wherein the opening contacts a surface portion of the substrate. First, a conductive material is deposited over at least a portion of the inside of the opening and over at least a portion of the surface of the insulative material which is outside the opening. Next, a tungsten-containing fill material is deposited over at least a portion of the conductive material which is over the surface portion of the substrate and which is over the insulative material outside of the opening. At that point, the tungsten material at least partially fills the opening. At least a portion of the tungsten-containing fill material and the conductive material which is over the insulative material outside the opening is then removed. The removal is effected by planarization. Next, at least a portion of the tungsten-containing fill material is removed from the opening.
According to another aspect of the invention, a structure comprises a substrate with an insulative material over the substrate.
Drynan John M.
Yang Sam
Kennedy Jennifer M.
Niebling John F.
LandOfFree
Planarization of metal container structures does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Planarization of metal container structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Planarization of metal container structures will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3165462