Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2007-06-05
2007-06-05
Tran, Minhloan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S738000, C257S778000, C257SE23020, C257SE23021, C257SE23023, C257SE23069, C438S108000, C438S109000
Reexamination Certificate
active
10977263
ABSTRACT:
The present invention discloses techniques that improve the reliability of a flip packages that uses underfill encapsulation. One embodiment of the present invention describes a method and apparatus of packaging a flip chip by relocating the neutral plane of the package substrate away from its mid-plane. Another embodiment of the present invention describes a method and apparatus of arranging the layers of a laminate for use in PBGA packaging that arranges the layers of the laminate according to the stiffness of each layer. Another embodiment of the present invention describes a method and apparatus of packaging a flip chip that uses one or more redundant interconnections at the bottom of the package substrate where the redundant interconnections are within the shadow of the IC chip.
REFERENCES:
patent: 4990996 (1991-02-01), Kumar et al.
patent: 5598036 (1997-01-01), Ho
Chang Chi Shih
Chen William T.
Trivedi Ajit
Blakely , Sokoloff, Taylor & Zafman LLP
Cruz Leslie Pilar
Tran Minhloan
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