Pipeline of additional storage elements to shift...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S729000, C714S733000, C714S741000, C714S742000, C716S030000

Reexamination Certificate

active

07823034

ABSTRACT:
An electronic device includes a scan-based circuit that includes a combinational decompressor, a combinational compressor, scan chains, and logic which typically includes a number of storage elements. Cycle time normally needed to shift data into or out of a scan cell to/from an external interface of the electronic device is reduced by use of one or more additional storage element(s) located between the external interface and one of the combinational elements (decompressor/compressor). The one or more additional storage element(s) form a pipeline that shifts compressed data in stages, across small portions of an otherwise long path between the external interface and one of the combinational elements. Staged shifting causes the limit on cycle time to drop to the longest time required to traverse a stage of the pipeline. The reduced cycle time in turn enables a corresponding increase in shift frequency.

REFERENCES:
patent: 6114892 (2000-09-01), Jin
patent: 6611933 (2003-08-01), Koenemann et al.
patent: 6684358 (2004-01-01), Rajski et al.
patent: 7038494 (2006-05-01), Morton
patent: 7159161 (2007-01-01), Lee et al.
patent: 7395473 (2008-07-01), Cheng et al.
patent: 7590905 (2009-09-01), Abdel-Hafez et al.
patent: 2003/0171906 (2003-09-01), Parulkar et al.
patent: 2005/0268190 (2005-12-01), Kapur et al.
patent: 2006/0064614 (2006-03-01), Abdel-Hafez et al.
patent: 2006/0156144 (2006-07-01), Cheng et al.
patent: 2008/0133987 (2008-06-01), Rajski et al.
patent: 2008/0256497 (2008-10-01), Wohl et al.
patent: 2008/0294953 (2008-11-01), Cheng et al.
Pateras, Achieving At-Speed Structural Test, Sep. 15, 2003, IEEE, vol. 20, pp. 26-33.
G. Hetherington, T. Fryars, N. Tamarapalli, M. Kassab, A. Hassan, J. Rajski, “Logic BIST for Large Industrial Designs: Real Issues and Case Studies”,International Test Conference1999, pp. 358-367.
C. Barnhart, V. Brunkhorst, F. Distler, O. Farnsworth, B. Keller, B. Koenemann, “OPMISR: The Foundation for Compressed ATPG Vectors”,International Test Conference2001.
D.M. Wu, M. Lin, S. Mitra, K.S. Kim, A. Sabbavarapu, T. Jaber, P. Johnson, D. March, G. Parrish, “H-DFT: A Hybrid DFT Architecture for Low-Cost High-Quality Structural Testing”,International Test Conference2003.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Pipeline of additional storage elements to shift... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pipeline of additional storage elements to shift..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pipeline of additional storage elements to shift... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4238424

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.