Pipeline display control apparatus with logic for blocking graph

Details Pipeline display control apparatus with logic for blocking graph Pipeline display control apparatus with logic for blocking graph

1985-06-24

1989-03-07

Williams, Jr., Archie E.

Boots, shoes, and leggings

364521, 340750, 340799, G06F 314, G06F 1314

Patent

active

048112054

ABSTRACT:
A graphics display apparatus employs a general purpose or main microprocessor providing general control of the apparatus including receiving high-level graphic orders defining a desired graphic image from a host processor and dedicated graphics microprocessor connected to receive low-level graphic orders from the general microprocessor along a pipeline constituted by a shared buffer store. Pipeline control logic controls the pipeline by blocking the graphics processor which generally operates more quickly than the general processor until the latter has completed computation of all the low-level orders associated with a particular high-level order. The front-of-screen performance can be further improved by backing up the pipeline to repeat certain low-level orders rather than by obtaining these repeated orders by recomputation. Graphics hardware controlled by the graphics processor loads appropriate bit patterns into an all points addressable refresh buffer for subsequent display on a cathode ray tube monitor.

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Foley et al: "Fundamentals of Interactive Computer Graphics", published by Addison-Wesley Publishing Company, 1982, pp. 391-429.
Computer Design, vol. 20, No. 12, Dec. 1981, pp. 116-118 Winchester, Massachusetts, US: P. Killmon: "Bubble Memory Mass Storage Fits Graphics Terminal to Rugged Uses".

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