Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-03
2007-07-03
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
11117968
ABSTRACT:
A coupling unit that couples at least two pins of an ATE (Automated Test Equipment) to a pin of a device under test includes an ATE interface for receiving a plurality of first stimulus signals from selected ATE-pins and/or for sending a plurality of first response signals to the selected ATE-pins, a DUT interface for sending a second stimulus signal to the DUT-pin and/or for receiving a second response signal from the DUT-pin, and a multiplexer circuit for serializing data of the plurality of first stimulus signals into the second stimulus signal and/or a de-multiplexer circuit adapted for parallelizing data of the second response signal into the plurality of first response signals.
REFERENCES:
patent: 4972413 (1990-11-01), Littlebury et al.
patent: 4989209 (1991-01-01), Littlebury et al.
patent: 5453995 (1995-09-01), Behrens
patent: 5499248 (1996-03-01), Behrens et al.
patent: 5677916 (1997-10-01), Nozuyama
patent: 10147298 (2002-05-01), None
patent: 0637137 (1995-02-01), None
patent: 0859318 (1998-08-01), None
patent: 0864977 (1998-09-01), None
patent: 0882991 (1998-12-01), None
patent: 0886214 (1998-12-01), None
patent: 1213870 (2002-06-01), None
patent: WO 00/25144 (2000-05-01), None
Cai Y. et al. “Digital Serial Communication Device Testing and Its Implications on Automatic Test Equipment Architecture”, Proceedings of the International Test Conference, IEEE US, Oct. 30, 2003, pp. 600-609.
Napier T. Ed, “Validating and characterizing high speed datacom devices”, International Manufacturing Technology Symposium, IEEE US, Jul. 16, 2003, pp. 221-224.
Masaya Tamamura et al., “4 GB/S ECL Gate Masterslice”, Proceedings of the Custom Intergrated Circuits Conference, IEEE US, May 15, 1989, pp. 1481-1484.
EP Search Report, Oct. 11, 2004.
Moll Joachim
Rottacker Markus
Perman & Green LLP
Tu Christine T.
Verigy (Singapore Pte. Ltd.
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