Physically defined varactor in a CMOS process

Details Physically defined varactor in a CMOS process Physically defined varactor in a CMOS process

2002-02-26

2004-07-20

Zarneke, David A. (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06764891

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to integrated circuits and, in particular, to a variable capacitor in complementary metal oxide semiconductor (CMOS) process.
2. Background Information
Data access rates for Synchronous Optical Network (SONET) and Synchronous Digital Hierarchy (SDH) networks are steadily increasing as demand for web content move toward video-on-demand, streaming video, and audio, and teleconferencing applications. The current trend is to provide such high bandwidth access over coaxial cables and optical fibers has using SONET and SDH signaling formats. SONET specifies a set of transmission speeds (or data rates), which are multiples of the optical carrier level one (OC-1) channel data rate of 51.840 megabits per second (Mbps). For example, it is common to provide access at Optical Carrier level three/Synchronous Transfer Module 1 (OC-3)/(STM-1) rate, which is a data rate of 155.52 megabits per second (Mbps).
To accomplish data access at such data rates, the SONET/SDH standards demand components that have high levels of integrations, low power consumption, and low jitter. Jitter is commonly defined as short-term variations of a digital signal's significant instants from their ideal positions in time. Jitter tolerance is the peak-to-peak amplitude of sinusoidal jitter applied at the line interface input that causes an equivalent 1 dB signal-to-noise ratio (SNR) loss measured as bit error rate (BER)=10
−10
. The stringent SONET specify that the jitter gain by optical transceivers on an OC-3 channel (155.52 Mbps) be less than 0.1 dB and that the output jitter (e.g., jitter generation, intrinsic jitter) be less than 0.1UI peak-to-peak or 0.01UI rms
Such demanding standards may be difficult to achieve with current transceivers implemented in complementary metal oxide semiconductor (CMOS) technology. To explain, an oscillator with a low jitter gain is usually an inductor-capacitor tank voltage controlled oscillator (LC tank VCO).
What limits the noise in an LC tank is its small quality factor (Q), which is a measure of the LC tank's frequency response (i.e., it's noise bandwidth). A degraded Q causes the center frequency of the LC tank to shift and it'ts output jitter to increase, as is well known. The Q of an LC tank is given by:
Q=&ohgr;L/R
eff
=1/(&ohgr;
C
eq
)(
R
eff
)  (Equation 1)
where &ohgr; is the angular frequency of the signal through the capacitor and inductor, C
eq
is the equivalent capacitance in farads, L is the value of the inductor in henrys, and R
eff
is the equivalent resistance (or resistivity) of the circuit.
To obtain a high Q, the inductance (L) may be increased, the capacitance (C) may be decreased, and the effective resistance (R
eff
) may be decreased. It is not anticipated the any technological advances will improve inductance-related Q. Therefore, to improve LC tank Q, the capacitance-related Q may be matched to the L-related Q using a voltage-controlled capacitor (or varactor). In low frequency applications, the inductor Q is typically around four or five. Prior art CMOS voltage controlled capacitors have similar Qs in low frequency applications (e.g., around five or six). In high frequency applications, the inductor Q can be as high as twenty or thirty. Unfortunately, prior art CMOS voltage controlled capacitors do not have comparable Qs because of relatively large parasitic resistance (R
eff
). In many instances, the Q of the LC tank is so degraded that it may be unusable in SONET or other high-speed environments having demanding jitter performance standards because the parasitic resistance is a source of noise, which reduces jitter performance.


REFERENCES:
patent: 4753898 (1988-06-01), Parrillo et al.
Altmann, M. et al.; A Low-Power CMOS 155Mb/s Transceiver for SONET/SDH over Co-ax & Fibre; 2001 Custom Integrated Circuits Conference; 4 pages.

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