Photoresist reflow for enhanced process window for random,...

Details Photoresist reflow for enhanced process window for random,... Photoresist reflow for enhanced process window for random,...

2002-02-16

2004-08-31

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

With measuring or testing

Optical characteristic sensed

C438S947000, C438S975000

Reexamination Certificate

active

06784005

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor device fabrication, and more particularly to the use of photoresist reflow in conjunction with assist features and/or off-axis illumination (OAI) for such fabrication.
BACKGROUND OF THE INVENTION
Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC's with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, and less are becoming routine. Improvement in overlay tolerances in photolithography, and the introduction of new light sources with progressively shorter wavelengths, have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC's have begun to be manufactured that have features smaller than the lithographic wavelength.
Sub-wavelength lithography, however, places large burdens on lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. The resulting semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer. These distortions include line-width variations dependent on pattern density, which affect a device's speed of operation, and line-end shortening, which can break connections to contacts. To avoid these and other optical proximity effects, the semiconductor industry has attempted to compensate for them in the photomasks themselves, as well as by using other approaches.
This compensation in the masks themselves is generally referred to as optical proximity correction (OPC). The goal of OPC is to produce smaller features in an IC using a given equipment set by enhancing the printability of a wafer pattern. OPC applies systematic changes to mask geometries to compensate for the nonlinear distortions caused by optical diffraction and resist process effects. A mask incorporating OPC is thus a system that negates undesirable distortion effects during pattern transfer. OPC works by making small changes to the IC layout that anticipate the distortions. OPC offers basic corrections and a useful amount of device yield improvement, and enables significant savings by extending the lifetime of existing lithography equipment. Distortions that can be corrected by OPC include line-end shortening, corner rounding, and isolated-dense proximity effect.
Isolated-dense proximity effect, or bias, in particular refers to the degree to which the mean of measured dense features differs from the mean of like-sized measured isolated features. Isolated-dense bias is especially important in the context of critical dimensions (CD's), which are the geometries and spacings used to monitor the pattern size and ensure that it is within the customer's specification. CD bias, therefore, refers to when the designed and actual values do not match. Ideally, bias approaches zero, but in actuality can measurably affect the resulting semiconductor device's performance and operation. Isolated features, such as lines and contacts, can also negatively affect depth of focus (DOF), such that they cannot be focused as well with the lithography equipment as can dense features.
Contacts are two-dimensional features that are typically, but not necessarily, substantially square semiconductor features. They generally allow external electrical connectivity to semiconductor devices. Whereas OPC can improve resolution and depth of focus (DOF) for dense arrays and groupings of contacts, it is not as successful for random, isolated, and semi-dense contacts, which are generally referred to herein as non-dense contacts. Random contacts are those that appear randomly isolated within a semiconductor design. Isolated contacts can more generally appear either randomly or on an orderly or regular basis within a design. Semi-dense contacts are those that appear with a periodicity less than a given threshold.
OPC can be used to correct the isolated-dense proximity effect and the isolated-feature DOF reduction by adding scattering bars (SB's) and anti-scattering bars (ASB's) near the edges of opaque and clear features, respectively, on a photomask. SB's are sub-resolution opaque-like features, whereas ASB's are sub-resolution clear-like features. SB's and ASB's are specific examples of assist features, which are features added to the mask that are not specifically part of the intended semiconductor design, but which assist the proper imprinting of the design on the photoresist. Both SB's and ASB's serve to alter the images of isolated and semi-isolated lines to match those of densely nested lines, and improve DOF so that isolated lines can be focused as well as dense lines can with the lithography equipment. For example,
FIG. 1A
shows a set of SB's
100
, whereas
FIG. 1B
shows the placement of such sets of SB's
100
near an isolated line
102
, in contradistinction to the dense sets of lines
104
and
106
.
Another issue that impacts the quality of lithography is focus variation, which is nearly ubiquitous in IC manufacturing because of the combined effects of many problems, such as wafer non-flatness, auto-focus errors, leveling errors, lens heating, and so on. A useful lithographic process should be able to print acceptable patterns in the presence of focus variation. Similarly, a useful lithographic process should be able to print acceptable patterns in the presence of variation in the exposure dose, or energy, of the light source being used. To account for these simultaneous variations of exposure dose and /focus, it is useful to map out the process window, such as an exposure-defocus (ED) window, within which acceptable lithographic quality occurs. The process window for a given feature, with or without OPC to compensate for distortions, shows the ranges of exposure dose and DOF that permit acceptable lithographic quality.
For example,
FIG. 2
shows a graph
200
of a typical ED process window for a given semiconductor pattern feature. The y-axis
202
indicates exposure dose of the light source being used, whereas the x-axis
204
indicates DOF. The line
206
maps exposure dose versus DOF at one end of the tolerance range for the CD of the pattern feature, whereas the line
208
maps exposure dose versus DOF at the other end of the tolerance range for the CD of the feature. The area
210
enclosed by the lines
206
and
208
is the ED process window for the pattern feature, indicating the ranges of both DOF and exposure dose that permit acceptable lithographic quality of the feature. Any DOF-exposure dose pair that maps within the area
210
permits acceptable lithographic quality of the pattern feature. As indicated by the area
210
, the process window is typically indicated as a rectangle, but this is not always the case, nor is it necessary.
Unfortunately, the process window typically varies by pattern feature. For example, the shape of the ED window for dense patterns, such as dense groupings of lines and contacts, is different than that for isolated patterns, such as isolated single lines and contacts. This is usually true even if the patterns have been modified by OPC to compensate for distortions. Individually optimizing the CD's of a wafer's features via OPC thus does not result in a maximized common process window over all the features. For various patterns, each having a different pitch—which is generally defined as the periodicity of a common feature within the pattern, such as a line or a contact—this means that applying OPC to each pattern to achieve identical pattern CD's results in unequal process windows. The unequal process windows cannot be matched to one another to create a maximized common window.
At best, a non-maximized

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