Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-03-13
2002-09-17
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C349S042000, C430S005000
Reexamination Certificate
active
06451635
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a photolithography system, and a method for fabricating a thin film transistor array substrate using the same.
(b) Description of the Related Art
Generally, a semiconductor device is formed through depositing a plurality of thin films onto a substrate, and repeatedly etching the thin films by a photolithography using a photoresist.
In the photolithography process, a photoresist film is first deposited onto the uppermost thin film, and baked through soft baking. Thereafter, the photoresist film is exposed to light using a mask, and selectively removed using a developing solution. The resulting photoresist pattern goes through hard baking, and the underlying thin films are selectively removed using the photoresist pattern as a mask. In this way, the thin film patterns are completed.
In the light exposing process, the shape of masks or the construction of shots may differentiate the amount of light illuminated on the photoresist film. As the light exposing time is longer than the time for depositing or developing the photoresist film, it is required for improving productivity in the photolithography process to effectively control the light exposing process.
Meanwhile, a liquid crystal display has a thin film transistor (TFT) array substrate, a color filter substrate facing the TFT array substrate, and a liquid crystal layer sandwiched between the TFT array substrate and the color filter substrate.
In the TFT array substrate, TFTs and lines are formed on an insulating substrate through depositing thin films on the substrate and repeatedly performing the photolithography process with respect to the thin films. In order to simplify the steps of fabricating such a TFT array substrate, it has been suggested that a minute slit pattern where the slit size is so small as to exceed the decomposing capacity of the light exposure, or a separate film having a different light transmission is formed at the mask, and a photoresist pattern having a portion with a half thickness is formed using such a mask to thereby pattern one or more of the underlying thin films through one photolithography process. However, in such a technique, it is difficult to form uniform patterns over the entire area of a large-sized substrate.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a photolithography system which enhances productivity in the semiconductor fabrication process.
It is another object of the present invention to provide a method for fabricating a TFT array substrate for a liquid crystal display that bears simplified processing steps.
These and other objects may be achieved by a photolithography system for a semiconductor device, and a TFT array substrate for a liquid crystal display fabricated using the photolithography system.
The photolithography system includes a deposition unit for depositing a photoresist film onto a substrate, first and second light exposing units for exposing the photoresist film to light, and a developing unit for developing the light-exposed photoresist film.
In the method of performing photolithography based on such a photolithography system, a photoresist film is first deposited onto a thin film formed on a substrate. The photoresist film is first exposed to light and, then, secondly exposed to light. Thereafter, the light-exposed photoresist film is developed such that it has at least three portions of different thickness.
The first and second light exposing are performed each with a separate light exposing unit. The intensity of light at the second light exposing is lower than the intensity of light at the first light exposing. The time period for the second light exposing is shorter than the time period for the first light exposing.
According to one aspect of the present invention, in the method of fabricating the TFT array substrate, a gate line assembly is first formed on an insulating substrate. The gate line assembly includes gate lines, and gate electrodes connected to the gate lines. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductive layer are sequentially deposited onto the substrate with the gate line assembly. The conductive layer, the ohmic contact layer, and the semiconductor layer are patterned to thereby form a data line assembly, an ohmic contact pattern and a semiconductor pattern. The data line assembly includes data lines, source electrodes connected to the data lines, and drain electrodes separated from the data lines and the source electrodes. A protective layer is formed on the substrate while covering the data line assembly. The protective layer has a contact hole exposing the drain electrode. Pixel electrodes are formed on the substrate such that each pixel electrode is connected to the drain electrode via the contact hole.
The step of forming the data line assembly, the ohmic contact pattern and the semiconductor pattern is performed through photolithography based on a photoresist pattern. The photoresist pattern is made through first exposing a photoresist film to light to form the data line assembly, and secondly exposing the photoresist film to light to form a channel between the source and drain electrodes. The photoresist pattern includes a first portion placed between the source and drain electrodes with a predetermined thickness, a second portion having a thickness larger than the thickness of the first portion, and a third portion having no thickness.
According to another aspect of the present invention, in the method of fabricating the TFT array substrate, a gate line assembly is first formed on an insulating substrate. The gate line assembly includes gate lines, gate electrodes connected to the gate lines, and gate pads connected to the gate lines. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductive layer are sequentially deposited onto the substrate with the gate line assembly. The conductive layer, the ohmic contact layer, the semiconductor layer and the gate insulating layer are patterned to thereby form a first contact hole exposing the gate pad, a conductive pattern, an ohmic contact pattern, and a semiconductor pattern. The conductive pattern and the ohmic contact pattern are patterned to thereby complete a data line assembly and ohmic contact patterns. The data line assembly includes data lines, source electrodes connected to the data lines, drain electrodes separated from the data lines and the source electrodes, and data pads connected to one-sided end portions of the data lines. Pixel electrodes are formed on the substrate such that each pixel electrode is connected to the drain electrode. A protective layer is formed on the substrate while covering the data line assembly and the pixel electrodes. The protective layer has second and third contact holes exposing the gate and data pads, respectively.
The step of forming the first contact hole, the ohmic contact pattern and the semiconductor pattern is performed through photolithography based on a photoresist pattern. The photoresist pattern is made through first exposing a photoresist film to light to form the conductive pattern, and secondly exposing the photoresist film to light to form the first contact hole. The photoresist pattern has a first portion placed over the conductive pattern with a predetermined thickness, a second portion placed over the first contact hole with no thickness, and a third portion thinner than the first portion.
According to still another aspect of the present invention, in the method of fabricating the TFT array substrate, a gate line assembly is first formed on an insulating substrate. The gate line assembly includes gate lines, gate electrodes connected to the gate lines, and gate pads connected to the gate lines. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited onto the substrate with the gate line assembly. The ohmic contact layer, the semiconductor layer and the gate insulating layer are patterned to the
Park Woon-Yong
Yoon Jong-Soo
Chaudhuri Olik
McGuireWoods Hae-Chan Park
Samsung Electronics Co,. Ltd.
Schillinger Laura M
LandOfFree
Photolithography system and a method for fabricating a thin... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Photolithography system and a method for fabricating a thin..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Photolithography system and a method for fabricating a thin... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2831447