Phosphorus dopant control in low-temperature Si and SiGe...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S234000, C438S235000, C438S312000, C438S313000, C438S315000, C438S341000, C438S357000, C257S461000, C257S463000, C257S464000

Reexamination Certificate

active

06579752

ABSTRACT:

The present invention relates to a method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas.
Such a method relates to the growth of doped epitaxial Si or Si
1−x
Ge
x
(SiGe) layers on monocrystalline silicon by chemical vapour deposition (CVD). Controlling the dopant concentration and dopant profile in such epitaxial layers may be a challenging task.
It is known in the art that during epitaxial growth of Si or SiGe in combination with doping at a low temperature, the incorporation of dopant continues after switching off the dopant supply. This process is generally known as the autodoping effect. Due to this effect in such an epitaxial growth process, the dopant profile obtained will differ from the desired profile.
Typically, such an autodoping effect occurs due to (high-temperature) diffusion of a dopant from the underlying layer into the grown epitaxial layer, due to desorption of dopant species from the walls and the substrate holder of an epitaxy reactor vessel, and due to evaporation of dopant species from the front and back side of the substrate. Autodoping may thus alter the dopant concentration in the epitaxial layer in a rather unpredictable manner.
However, it is also known in the art that at a low growth temperature, segregation of n-type dopants (P, As) occurs at the Si surface, which influences the dopant profile in the epitaxial layer.
Thus, high-temperature processes (at a temperature between ~800 and ~1200° C.) have been developed in which the autodoping effect is suppressed, while at the same time segregation of the dopant is avoided.
EP 0905288 A1 discloses a high temperature CVD process for growth of epitaxial layers in which the dopant concentration changes abruptly at the interface of the epitaxial layer and the monocrystalline Si substrate. During the final stage of the pre-epi bake, when most or all of the native oxide has been removed, a pressure pulse is generated by a flow of reducing gas which lowers the dopant concentration at the surface. The pressure is increased from ~1.33×10
4
Pa to ~1,013×10
5
Pa. After a subsequent purge step to reduce the pressure again to ~1.33×10
4
Pa, an epitaxial film is grown in a low-pressure CVD process, in which the autodoping effect is suppressed.
Methods according to the prior art, as described above, disadvantageously suffer from the fact that growth processes take place at a relatively high temperature. At a high temperature, the diffusion rate of dopants is high, which strongly complicates the formation of an abrupt dopant profile in the epitaxial layer, i.e., a well-defined (e.g. block-shaped) concentration profile of the n-type dopant.
Furthermore, a well-known way to prevent autodoping is the removal of excess P (or As) from the surface of a semiconductor wafer and from the inside surfaces of the epitaxy reactor chamber in a desorption step at a reduced pressure and a high temperature. However, such a high-temperature step defeats the purpose to grow steep profiles due to high diffusion rates of the dopants at that temperature.
Moreover, the methods from the prior art all relate to epitaxial layers having a thickness of at least one micron. The formation of shallow layers with abrupt n-type dopant profiles does not appear feasible if use is made of the methods from the prior art.
It is an object of the present invention to overcome the disadvantages of the prior art by providing a process which allows the formation of thin Si or SiGe epitaxial layers with well-defined and abrupt n-type dopant profiles.
The object of the present invention is obtained by a method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas, the growth process being performed at a pressure higher than 2.66×10
4
Pa.
Advantageously, the method according to the present invention enables the autodoping of epitaxial layers to be suppressed by using an n-type dopant. Moreover, the growth of very thin epitaxial layers (less than ~100 nm) with an abrupt n-type dopant profile is feasible using the method according to the present invention.


REFERENCES:
patent: 5700520 (1997-12-01), Beinglass et al.
patent: 5821155 (1998-10-01), Izumi et al.
patent: 5915187 (1999-06-01), Huisman et al.
patent: 6197666 (2001-03-01), Schafer et al.
patent: 6300558 (2001-10-01), Takamoto et al.
patent: 6346452 (2002-02-01), Kabir et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Phosphorus dopant control in low-temperature Si and SiGe... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phosphorus dopant control in low-temperature Si and SiGe..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phosphorus dopant control in low-temperature Si and SiGe... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3149522

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.