Phase-change random access memories capable of suppressing...

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S051000, C365S063000, C365S189040

Reexamination Certificate

active

07929337

ABSTRACT:
A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line connected to the local bit lines. The phase-change memory device having the write global bit line and the read global bit line suppress coupling noise generated during a read-while-write operation.

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patent: 2006/0083045 (2006-04-01), Kamoshida et al.
patent: 2006/0092724 (2006-05-01), Kanda
patent: 2004-086986 (2004-03-01), None
patent: 2005-158199 (2005-06-01), None
patent: 2006-514440 (2006-04-01), None

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