Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
1999-03-22
2004-06-08
Talbott, David J. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S691000, C257S738000, C257S778000, C174S260000, C174S262000
Reexamination Certificate
active
06747362
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated circuit package.
2. Description of Related Art
Integrated circuits are typically mounted to a package that is soldered to a printed circuit board. One such type of integrated circuit package is a ball grid array (“BGA”) package. BGA packages have a plurality of solder balls located on a bottom external surface of a package substrate. The solder balls are reflowed to attach the package to the printed circuit board. The integrated circuit is mounted to a top surface of the package substrate, and electrically coupled to the solder balls by internal routing within the package.
FIG. 1
shows a solder ball array of a prior art BGA package
2
. The solder balls
4
are arranged in a two-dimensional pattern across the bottom surface of the package. The integrated circuit
6
is centrally located on the opposite side of the package
2
. The package
2
is typically constructed from a material which has a coefficient of thermal expansion that is different than the thermal expansion coefficient of the integrated circuit. It has been found that the differential thermal expansion between the integrated circuit and the package will induce temperature related stresses that fail solder joints in an area which corresponds to the outer edges of the circuit die.
FIG. 2
shows a BGA package
2
of the prior art which has an outer two dimensional array of solder balls
4
. The solder balls
4
are located away from the package area that is beneath the integrated circuit
6
. Locating the solder balls
4
away from the integrated circuit
6
reduces the thermal stresses on the solder joints created by the differential expansion between the package and the integrated circuit. Although effective in reducing solder failure the outer array pattern limits the input/output (I/O) of the package. Additionally, the integrated circuit generates heat which conducts through the solder balls and into the printed circuit board. Locating the solder balls at the outer perimeter of the package increases the thermal path through the package substrate. The longer path increases the thermal impedance of the package and the junction temperature of the integrated circuit. It would be desirable provide a BGA package that has a longer product life, lower thermal impedance and higher I/O than BGA packages of the prior art.
SUMMARY OF THE INVENTION
The present invention is a ball grid array (“BGA”) integrated circuit package which has an outer two-dimensional array of solder balls and a center two-dimensional array of solder balls located on a bottom surface of a package substrate. The solder balls are typically reflowed to mount the package to a printed circuit board. Mounted to an opposite surface of the substrate is an integrated circuit that is electrically coupled to the solder balls by internal routing within the package. The outer array of solder balls are located outside the dimensional profile of the integrated circuit to reduce solder stresses induced by the differential thermal expansion between the integrated circuit and the substrate. The center solder balls are typically routed directly to ground and power pads of the package to provide a direct thermal and electrical path from the integrated circuit to the printed circuit board.
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J
Talbott David J.
Vigushin John B.
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