Pedestal transistors and method of production thereof

Details Pedestal transistors and method of production thereof Pedestal transistors and method of production thereof

1987-05-11

1988-03-01

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156653, 156656, 156657, 156662, 357 43, 357 56, 437 21, 437 31, 437 34, 437 40, 437 46, 437193, 437200, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

047283912

ABSTRACT:
The present invention describes a method of producing an MOS, bipolar and Bimos pedestal transistor wherein the source, drain, and gate metals are in place prior to the source/drain diffusion in a MOS transistor; and the emitter and base metals are in place before junction formation on the bipolar transistors. This is accomplished in MOS devices by a first blanket implantation of impurities into a first polysilicon layer during processing and a second blanket implantation into a second polysilicon layer subsequent to deposition of the metal layers. This is accomplished in bipolar devices by the above, or by blanket implantations subsequent to the deposition of the metal layers.

REFERENCES:
patent: 4642880 (1987-02-01), Mizutani et al.
patent: 4648941 (1987-03-01), Blanchard
patent: 4657630 (1987-04-01), Agatsuma
patent: 4675984 (1987-06-01), Hsu
patent: 4698126 (1987-10-01), Van Roosmalen et al.

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