Patterned backside stress engineering for transistor...

Details Patterned backside stress engineering for transistor... Patterned backside stress engineering for transistor...

2008-05-13

2008-05-13

Dickey, Thomas (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S228000, C438S587000, C438S770000, C257SE21633, C257SE21703

Reexamination Certificate

active

07371630

ABSTRACT:
Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

REFERENCES:
patent: 6806151 (2004-10-01), Wasshuber et al.
patent: 7169659 (2007-01-01), Rotondaro et al.
patent: 2005/0208776 (2005-09-01), Krishnan et al.
patent: 2006/0024873 (2006-02-01), Nandakumar et al.

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