Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-06-27
2006-06-27
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C358S001100
Reexamination Certificate
active
07069487
ABSTRACT:
A technique of logically processing bit maps and character maps describing the attributes and values of computer variable ranges and a variable being tested to determine if a match exists between the variable and one or more ranges. Bit maps define the attributes of each character position of variables and ranges; character maps define which character positions are constrained to a fixed character for each of the ranges. This quick and efficient method of logical processing of maps replaces the known method of examining each character position of a variable individually.
REFERENCES:
patent: 6366695 (2002-04-01), Nicholson et al.
patent: 6381028 (2002-04-01), Gauthier
patent: 6771387 (2004-08-01), Gauthier
Herndon Jerry W.
Tu Christine T.
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