Pattern forming method using photolithography

Details Pattern forming method using photolithography Pattern forming method using photolithography

2001-06-29

2004-02-03

Huff, Mark F. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Forming nonplanar surface

C430S030000, C430S312000, C430S328000, C216S083000, C216S084000, C216S085000

Reexamination Certificate

active

06686130

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-200121, filed Jun. 30, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a pattern forming method for forming a resist pattern by photolithography on a target substrate in the manufacture of a semiconductor device, particularly, to a pattern forming method in which the terminal point of the development is judged while monitoring a monitoring region in the developing step of a resist pattern.
Known is a method of controlling the developing time in the developing step on the basis of the result of the monitoring of a monitoring region formed separately from a device pattern in order to reduce the nonuniformity in size among the wafers. In this method, a monitoring region arranged in a specified chip of a wafer is monitored. Therefore, where the chip under monitoring is under unique conditions because of some causes and not processed under average conditions, the size of the chip that is not monitored is not finished at the desired size, though the size of the chip that is monitored is finished at the desired value, with the result that the average size of the wafers greatly deviates.
The present inventors have already proposed a method in order to overcome this problem. In the method previously proposed by the present inventors, latent images of a monitoring region in some chips before developing are monitored, and the chip which is processed under average conditions is extracted from among the chips. Also, the monitoring region of the extracted chip is monitored during the developing treatment so as to finish the developing treatment with an optimum developing time. In this method, however, it is impossible to obtain a sufficient accuracy in the case where the thickness of the underlying film fluctuates. Also, since the amount of change of the latent image of the monitoring region is monitored, it is impossible to consistently obtain chips which are processed under average conditions with a high accuracy if both the dose and the focus in exposure device fluctuate in the case that the monitoring region is affected by the focus fluctuation, e.g., a device pattern itself.
On the other hand, Japanese Patent No. 2818689 teaches a method that permits monitoring even where the thickness of the underlying film fluctuates. In this method, the final developing time and the dose are obtained from a unique point of the change in the intensity of the pattern such as maximum or minimum value in the change of the intensity. In recent years, however, the unique point in the change in the intensity of the pattern has come to be changed by not only the dose but also the fluctuation of the focus, in accordance with the miniaturization of the pattern size. Therefore, it is now impossible to obtain an optimum developing time from information of a unique point.
As described above, in the conventional method of controlling the developing time on the basis of monitoring of the monitoring region formed separately from the device pattern, a problem is generated in that the average size of the wafer greatly deviates in the case where the chip under monitoring is subject to unique of adverse conditions. Also, in the method of monitoring the latent image of the monitoring region for extracting the chip processed under average condition, it is impossible to obtain a sufficient accuracy in the case where the thickness of the underlying film fluctuates. In addition, in the case of a pattern in which the monitoring region is affected by the focus fluctuation, it is impossible to obtain a typical chip with a high accuracy if both the dose and the focus are fluctuated. Further, in accordance with the miniaturization of the pattern size, it is now impossible to obtain the optimum developing time from information on the unique point in the change in the intensity of the reflected light of the pattern.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a pattern forming method, for forming a device pattern by exposing a resist film on a to-be-processed substrate by the mask including device pattern developing the exposed resist film for a certain period and forming a device pattern comprising the steps of:
exposing the resist film by the mask including the device pattern and a monitoring region for each chip;
extracting a chip exposed in the focus condition within a set value and in the average dose condition before the developing step;
irradiating the monitor region situated in the extracted chip with light during the developing step of the resist and estimating the development time when the size of device pattern has reached desired value on the basis of the intensity change of the reflected light of the monitor region; and
supplying a stop solution onto the substrate in the estimated development time so as to stop the development.
According to a second aspect of the present invention, there is provided a pattern forming method, for forming a device pattern by exposing a resist film on a to-be-processed substrate by the mask including device pattern developing the exposed resist film for a certain period and forming a device pattern comprising the steps of:
exposing the resist film by the mask including the device pattern and a monitoring region for each chip;
irradiating the monitor region with light having a plurality of wavelengths during the development step of the resist and estimating the development time when the size of device pattern has reached desired value on the basis of the wavelength dispersion in the intensity of the reflected light of the monitor region; and
supplying a stop solution onto the substrate in the estimated development time so as to stop the development.
According to a third aspect of the present invention, there is provided a pattern forming method, for forming a device pattern by exposing a resist film on a to-be-processed substrate by the mask including device pattern developing the exposed resist film for a certain period and forming a device pattern comprising the steps of:
exposing the resist film by the mask including the device pattern and a monitoring region for each chip;
irradiating the monitor region with a light having a plurality of wavelengths during the developing step of the resist, converting intensity change of the reflected light of the monitor region into a phase, and estimating the development time when the size of device pattern has reached desired value on the basis of the converted phase; and
supplying a stop solution onto the substrate in the estimated development time so as to stop the development.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.


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patent: 2818689 (1998-08-01), None
Fujisawa et al.; “Control Method for Exposure Apparatus and Control Method for Semiconductor Manufacturing Apparatus” U.S. patent application Ser. No. 09/671,502, filed on Sep. 27, 2000, U.S. Pat. 6,376,139.
Hayasaki et al.; “Pattern Siz e Evaluation Apparatus”, U.S. patent application Ser. No. 09/030,510, filed on Feb. 25, 1998, U.S. Pat. 6,423,977.

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