Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
1997-08-18
2001-01-23
Utech, Benjamin (Department: 1765)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S192130, C204S192170, C204S192220
Reexamination Certificate
active
06176978
ABSTRACT:
BACKGROUND OF THE INVENTION
Semiconductor device wiring and interconnect structure is formed by layering various materials on a wafer in a prescribed pattern. Popular methods for depositing material layers include physical vapor deposition, chemical vapor deposition and the like. While these techniques produce stable material layers when deposited on an underlying wafer, material that deposits on other surfaces within the deposition chamber tends to flake or crumble as the deposition chamber thermally cycles, particularly when a significant amount of material has accumulated thereon. Such flaking or crumbling may cause wafer contamination. Accordingly, in order to reduce this type of contamination, chamber surfaces must be periodically coated with a pasting layer which prevents flaking and crumbling of the deposited material, as described below.
One of the most widely used deposition techniques (especially popular for electrical interconnect formation) is sputtering deposition. To deposit a film of material within a sputtering deposition chamber, a target of material to be deposited and a wafer (on which target material is to be deposited) are mounted within the chamber. A gas is flowed into the chamber and a negative voltage is applied to the target with respect to the chamber walls so as to excite the gas into a plasma state. As ions from the plasma bombard the target, energy is transferred from the energetic ions to the target, causing target particles to leave the target, travel in linear trajectories and deposit on the wafer.
As stated previously, sputtering deposition is often used for forming electrical interconnects within and between semiconductor devices formed on a wafer. One of the most popular interconnect materials is titanium-nitride because of its conductivity and diffusion-barrier properties. Unfortunately, titanium-nitride is brittle and when deposited alone can flake from chamber surfaces during thermal cycling. This flaking may contaminate an underlying wafer.
To prevent flaking, a pasting layer of titanium is often deposited over the titanium-nitride layer. The titanium layer bonds more tightly than titanium-nitride, and effectively glues underlying titanium-nitride layers in place on the chamber surfaces. Such titanium pasting layers are periodically deposited (e.g., every 25 wafers) on chamber surfaces to prevent deposited titanium-nitride layers from flaking therefrom. Pasting layers are most often deposited on non-production objects such as a dummy wafer or on the deposition chamber's shutter.
While pasting layers successfully reduce flaking and extend the processing time between required chamber cleaning and/or replacement of chamber parts (e.g., shields, pedestals, shutters, collimators and clamp rings), within a high density plasma deposition chamber the first production wafer processed following a pasting step (i.e., the first wafer) exhibits markedly different deposited film characteristics than the deposited film characteristics of subsequently processed production wafers (i.e., the first wafer effect occurs). Accordingly, the first wafer must be discarded.
A need therefore exists for an improved pasting process for use within a high density plasma deposition chamber that will not result in the first wafer effect.
SUMMARY OF THE INVENTION
Generally, a high density plasma deposition chamber employs a coil within a sputtering region of a vacuum chamber. The coil may have one or more turns and is placed so application of RF power to the coil generates an electric field that causes target atoms traveling through the plasma to ionize. The ionized target material is attracted to the wafer via a potential drop between the plasma region and the wafer and/or via a power signal or a voltage (i.e., a bias) applied to the wafer support and coupled therethrough to the wafer to create a voltage across the wafer (i.e., a bias voltage). The bias voltage attracts the ionized target material, causing the ionized target material to travel along a highly directional, perpendicular path. The perpendicularity of the sputtered ions' path enhances coverage of vias, trenches, and the like.
Although high density plasma deposition processes that apply a bias voltage to the wafer exhibit significantly improved coverage of surface features, it has been discovered that the bias voltage that couples to the first wafer processed following deposition of a pasting layer is not equivalent to the bias voltage that couples to wafers that are subsequently processed. Accordingly, in a high density plasma deposition chamber the first wafer processed following a pasting step may have poor or inconsistent crystal orientation and/or surface coverage as compared to subsequently processed wafers. It will be understood that as used herein the bias voltage that couples to a wafer is inferentially determined based on the readout of an AC meter coupled to the wafer support, rather than determined via direct measurement across the wafer itself.
The present invention provides a method of reducing particles within an deposition chamber, such as a high density plasma deposition chamber, yet maintaining consistent bias voltage coupling to the first wafer and to subsequently processed wafers. With use of the present invention, fewer poor quality deposited film layers result, and the cost of scrapped wafers caused by the first wafer effect is reduced. Further, the method of the present invention can be practiced with existing equipment and with very little additional processing time.
The present invention reduces particle generation by depositing a pasting layer, and overcomes the first wafer effect by depositing a transitional layer following pasting layer deposition. It is believed that the transitional layer effects the plasma composition within the deposition chamber, and the plasma composition in turn affects the efficiency with which the bias voltage couples through the wafer support to the wafer positioned thereon. While the preferred transitional layer comprises a layer of the material deposited during normal production (i.e., a production layer), other materials that affect the bias voltage's ability to couple through the wafer support to the wafer may be similarly employed.
In its preferred embodiment, within a titanium-nitride high density plasma deposition chamber, for example, the inventive process deposits a titanium pasting layer followed by a titanium-nitride transitional layer. Thus, the transitional layer changes the chamber, its surfaces and internal atmosphere, from a pasting environment (i.e., having higher concentrations of the pasting material on chamber surfaces and in the chamber's atmosphere) to a production environment (i.e., having higher concentrations of the production material on chamber surfaces and in the chamber's atmosphere). Preferably deposition of the transitional layer occurs with RF power applied to the chamber coil and thus deposition of the transitional layer also heats the chamber to the temperature employed during processing of production wafers. Most preferably the titanium-nitride transitional layer is deposited using a high density plasma deposition process, with RF coil power and DC target power levels equivalent to those employed during high density plasma deposition of titanium-nitride production layers. The inventive method may be used within any processing chamber (high density plasma deposition or otherwise) that applies a bias voltage to the wafer being processed.
Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description of the preferred embodiments, the appended claims and the accompanying drawings.
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Anderson Matthew
Applied Materials Inc.
Dugan & Dugan
Utech Benjamin
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