Passivation of inlaid metallization

Details Passivation of inlaid metallization Passivation of inlaid metallization

2000-11-03

2002-03-12

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S687000, C438S653000, C438S627000

Reexamination Certificate

active

06355559

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to the field of forming interconnect layers in integrated circuits.
BACKGROUND OF THE INVENTION
As the density of semiconductor devices increases, the demands on interconnect layers for connecting the semiconductor devices to each other also increases. Therefore, there is a desire to switch from the traditional aluminum metal interconnects to copper interconnects. Unfortunately, suitable copper etches for a semiconductor fabrication environment are not readily available. To overcome the copper etch problem, damascene processes have been developed.
In a conventional interconnect process, the aluminum (and any barrier metals) are deposited, patterned, and etched to form the interconnect lines. Then, an interlevel dielectric (ILD) is deposited and planarized. In a damascene process, the ILD is formed first. The ILD is then patterned and etched. The barrier layer and a copper seed layer are then deposited over the structure. The copper layer is the formed using the seed layer over the entire structure. The copper is then chemically-mechanically polished (CMP'd) to remove the copper from over the ILD
16
, leaving copper interconnect lines
18
as shown in
FIG. 1A. A
metal etch is thereby avoided.
Next, a silicon nitride layer
20
is deposited over the copper
18
and ILD
16
, as shown in FIG.
1
B. Copper must be surrounded by a barrier to prevent it from diffusing into the surrounding dielectric. Unfortunately, the silicon nitride layer increases the line-to-line capacitance. In addition, the poor interface between silicon nitride (a dielectric) and copper (a conductor) results in poor adhesion and poor electromigration (copper electromigration via interface diffusion).
One method of overcoming the problems associated with silicon nitride is shown in
FIGS. 2A-2C
. In this process the CMP step is continued to recess the top of the copper interconnect line
18
below the surface of the ILD
16
, as shown in FIG.
2
A. Titanium nitride (TiN)
22
is then deposited over the structure as shown in
FIG. 2B. A
second CMP step is then used to remove the TiN
22
from over the ILD
16
, as shown in FIG.
2
C. TiN
22
provides a better interface to the copper
18
than silicon nitride. However, an even better interface is still desired. Furthermore, the amount of dishing (recessing) varies with feature size. In fact, there is very little dishing in narrow lines.
SUMMARY OF THE INVENTION
A method for forming a metal interconnect is disclosed herein. After the metal interconnect lines are formed, a transition metal is deposited over the surface of the metal interconnect lines and reacted to form a metal-compound (e.g., a metal alloy or other metal compound). The metal-compound is then annealed in a nitrogen ambient to form a barrier layer at the surface of the metal interconnect lines.
An advantage of the invention is providing a barrier for a metal interconnect with good adhesion and electromigration properties.
This and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings.


REFERENCES:
patent: 6114238 (2000-09-01), Liao
patent: 6130157 (2000-10-01), Liu et al.
patent: 6147000 (2000-11-01), You et al.
patent: 5347274 (1993-12-01), None

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