Partial termination voltage current shunting

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S030000, C326S086000, C327S108000

Reexamination Certificate

active

07088130

ABSTRACT:
An apparatus includes termination circuitry to terminate one or more lines. The termination circuitry draws a first current from a termination voltage supply through a termination voltage delivery network for each terminated line carrying a first signal. Partial current shunt circuitry draws a second current from the termination voltage supply through the termination voltage delivery network for each terminated line carrying a second signal. The first and second currents are distinct.

REFERENCES:
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5338979 (1994-08-01), Mammano et al.
patent: 5359235 (1994-10-01), Coyle et al.
patent: 5420525 (1995-05-01), Maloberti et al.
patent: 5528167 (1996-06-01), Samela et al.
patent: 5576642 (1996-11-01), Nguyen et al.
patent: 5686872 (1997-11-01), Fried et al.
patent: 5721875 (1998-02-01), Fletcher et al.
patent: 5819099 (1998-10-01), Ovens
patent: 5959481 (1999-09-01), Donnelly et al.
patent: 5966042 (1999-10-01), Werner et al.
patent: 6121789 (2000-09-01), Liu et al.
patent: 6239621 (2001-05-01), Milshtein et al.
patent: 6356106 (2002-03-01), Greeff et al.
patent: 6448837 (2002-09-01), Naffziger
patent: 6483348 (2002-11-01), Naffziger
patent: 6721150 (2004-04-01), Guerrero et al.
patent: 2002/0084826 (2002-07-01), Naffziger
patent: 2003/0147482 (2003-08-01), Pasqualino et al.
patent: 0284356 (1988-09-01), None
patent: 0554121 (1993-08-01), None
patent: 0554121 (1994-07-01), None
patent: 2373974 (2001-01-01), None
Gabara, Thaddeus, et al. “Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers”, IEEE Journal of Solid State Circuits, vol. 32, No. 3, Mar. 1997, pp. 407-418.
Ilkbahar, Alper, et al. “Itanium Processor System Bus Design”, IEEE Journal of Solid State Circuits, vol. 36, No. 10, Oct. 2001, pp. 1565-1573.
United Kingdom Patent Office, Search Report for related foreign application No. GB0425063.5 (Mar. 24, 2005).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Partial termination voltage current shunting does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Partial termination voltage current shunting, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Partial termination voltage current shunting will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3640307

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.