Parallel output buffers in memory circuits

Details Parallel output buffers in memory circuits Parallel output buffers in memory circuits

1995-12-22

1997-11-18

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518902, 365 63, G11C 700

Patent

active

056894627

ABSTRACT:
A memory circuit with programmable memory array organization and number of data output terminals, capable of connecting unused output buffers in parallel in organizations requiring fewer output terminals than the maximum possible. Parallel connection of output buffers improves output transient performance and employs otherwise dfsabled output buffers to reduce waste of silicon area.

REFERENCES:
patent: 4907203 (1990-03-01), Wada et al.
patent: 5027326 (1991-06-01), Jones
patent: 5073872 (1991-12-01), Masuda et al.
patent: 5285416 (1994-02-01), Tokami et al.
patent: 5424982 (1995-06-01), Kato
patent: 5434823 (1995-07-01), Howard

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