Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1997-12-05
1999-10-26
Nelms, David
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365154, 36518512, G11C 1604, G11C 1100
Patent
active
059739673
ABSTRACT:
A page buffer facilitates programming of a memory cell within an associated memory array by selectively connecting a bit line associated with the memory cell to a negative voltage supply in response to the logic state of a data signal. The page buffer includes an SRAM latch having first and second nodes, a cross-coupled latch having first and second nodes, and a pass transistor. The first node of the SRAM latch is coupled to receive the data signal and to a first control terminal of the cross-coupled latch. The second node of the SRAM latch is coupled to a second control terminal of the cross-coupled latch. The second node of the cross-coupled latch is coupled to a gate of the pass transistor which, in turn, is connected between the bit line and the negative voltage supply. When the data signal is in a first logic state, the cross-coupled latch turns on the pass transistor and, in connecting the bit line to the negative voltage supply, facilitates programming of the cell. When the data signal is in a second logic state, the cross-coupled latch turns off the pass transistor and allows the bit line to float which, in turn, precludes programming of the cell.
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Kowshik Vikram
Nguyen Chinh D.
Sarin Vishal
Yu Andy Teng-Feng
Nelms David
Phan Trong
Programmable Microelectronics Corporation
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