Page buffer having dual register, semiconductor memory...

Details Page buffer having dual register, semiconductor memory... Page buffer having dual register, semiconductor memory...

2005-11-08

2005-11-08

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189120, C365S154000

Reexamination Certificate

active

06963509

ABSTRACT:
The present invention discloses a page buffer having a dual register, a semiconductor memory device having the same, and a program method thereof. A data transmission path is formed by installing switching units so that a main register as well as a cache register can be directly provided with a data. Therefore, a program operation is performed directly by using the main register in a normal program operation, and by using the cache register in a cache program operation. Accordingly, a process for transmitting the data from the cache register to the main register is omitted in the normal program operation, to reduce a transmission time (about 3 μs). As a result, the program time can be reduced in the whole program operation. Because the process for transmitting the data from the cache register to the main register is omitted in the normal program operation, the circuit control operation can be simplified.

REFERENCES:
patent: 6671204 (2003-12-01), Im
patent: 2003/0117856 (2003-06-01), Lee et al.

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