Page buffer for nonvolatile memory device

Details Page buffer for nonvolatile memory device Page buffer for nonvolatile memory device

2007-06-07

2010-06-01

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S185170, C365S185080

Reexamination Certificate

active

07729177

ABSTRACT:
A nonvolatile memory device implements a program routine followed by a program-verify routine when recording or modifying stored data. The nonvolatile memory device may include an array of memory cells for storing data, a sense node, and a gating circuit for selectively connecting a bitline of the array of memory cells to the sense node. The nonvolatile memory device may also include a page buffer coupled to the sense node. The page buffer may include a main latch for storing data to be written in the nonvolatile memory device, a cache latch for storing data supplied on an input line of the nonvolatile memory device to be transferred in the main latch through a source liner and a temporary static latch connected to the main latch through the source line and to the cache latch through an auxiliary switch and for transferring data between the main latch and the cache latch. The cache latch may be isolated from the source line during execution of the program routine and of the program-verify routine.

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