Page buffer circuit of memory device and program method

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S189011, C365S189140, C365S189170, C365S189080, C365S185220

Reexamination Certificate

active

07668023

ABSTRACT:
A page buffer circuit of a memory device including a plurality of Multi-Level Cells (MLCs) connected to at least a pair of bit lines includes a Most Significant Bit (MSB) latch, a Least Significant Bit (LSB) latch, a data I/O circuit, an inverted output circuit, a MSB verification circuit, and a LSB verification circuit. The MSB latch is configured to sense a voltage of a sensing node in response to a control signal and store an upper sensing data, and output an inverted upper sensing data, or store an input data and output an inverted input data. The LSB latch is configured to sense a voltage of the sensing node in response to the control signal, and store and output a lower sensing data, or store and output an input data received through the MSB latch. The data I/O circuit is connected to the MSB latch and a data I/O line, and is configured to perform the input and output of a sensing data or the input and output of a program data.

REFERENCES:
patent: 5724284 (1998-03-01), Bill et al.
patent: 5930172 (1999-07-01), Kucera
patent: 6091631 (2000-07-01), Kucera et al.
patent: 7254064 (2007-08-01), Kim et al.
patent: 7298648 (2007-11-01), Lee et al.
patent: 7301825 (2007-11-01), Seong et al.
patent: 7313020 (2007-12-01), Chae et al.
patent: 7336538 (2008-02-01), Crippa et al.
patent: 7359248 (2008-04-01), Chen et al.
patent: 7366014 (2008-04-01), Micheloni et al.
patent: 7391651 (2008-06-01), Chen
patent: 7515484 (2009-04-01), Seong
patent: 7594157 (2009-09-01), Choi et al.
patent: 2006/0198188 (2006-09-01), Ju
patent: 2007/0035995 (2007-02-01), Crippa et al.
patent: 2008/0080237 (2008-04-01), Park
patent: 2009/0196111 (2009-08-01), Seong
patent: 2009/0207669 (2009-08-01), Seong
patent: 10-2005-0007653 (2005-01-01), None
patent: 10-2007-0008899 (2007-01-01), None

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