Page buffer and programming method of a non-volatile memory...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S189120, C365S230080, C365S235000

Reexamination Certificate

active

07830725

ABSTRACT:
A page buffer includes a first ground voltage supply unit for applying a ground voltage to first and second registers according to a level of a sense node, and a second ground voltage supply unit for applying the ground voltage to the first and second registers irrespective of a level of the sense node. A method of programming a non-volatile memory device includes storing a high-level data in a first node of a first register of a plurality of page buffers, precharging a sense node with a high level, resetting the data stored in the first node of the first register according to a voltage level of the sense node, precharging the sense node with a high level, storing external data in the first node according to a voltage level of the sense node, and performing a program operation according to the data stored in the first node.

REFERENCES:
patent: 7269064 (2007-09-01), Kim
patent: 7333365 (2008-02-01), Seong
patent: 7515472 (2009-04-01), Chung
patent: 100172406 (1998-10-01), None
patent: 100204803 (1999-03-01), None
patent: 1020050094569 (2005-09-01), None
patent: 1020070068002 (2007-06-01), None

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