Package of a chip with beveled edges

Details Package of a chip with beveled edges Package of a chip with beveled edges

2001-04-19

2004-03-02

Talbott, David L. (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

C257S686000, C257S723000, C257S777000

Reexamination Certificate

active

06700178

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90105525, filed on Mar. 9, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates generally to a semiconductor package. More particularly, the present invention relates to a package of a chip with beveled edges.
2. Description of the Related Art
In semiconductor packaging, an attaching process for chips is a necessary step in the packaging fabrication. The attaching process comprises attaching a chip onto a carrier. A conventional package comprises a die pad on the carrier, which can allow the chip to adhere onto the carrier by utilizing an adhesive material. The adhesive material is usually filled in between the chip and the carrier as well as the sides of the chip in order to ensure the adhesive bonding between the chip and the carrier.
FIG. 1
illustrates a schematic view of a conventional package. A carrier, such as a lead frame, is first provided and is used to carry a chip
104
. In a packaging structure of a lead frame for a single chip, for example, the carrier has a plurality of leads (not shown) and a die pad
106
. A back surface of the chip
104
is adhered onto the die pad
106
by an adhesive material
102
such as epoxy or silver paste. In the process of adhering the chip
104
onto the die pad
106
, a region
110
of the die pad will be filled with the adhesive material
102
first before adhering the back surface of the chip onto the die pad
106
. The next step of the adhesive process comprises adhering one side of the chip
104
first, then lowering down the chip
104
gradually so that the chip
104
is adhered parallel to the die pad
106
. The purpose of this step is to prevent air or a void from occurring in between the chip and the die pad; thus the bonding ability of the chip and the die pad is increased. In order to ensure the bond ability between the chip and the die pad, a region
102
a
, which is located at both sides of the chip, is filled with the adhesive material
102
. A preferable thickness of the adhesive material in the region
110
, which is between 0.5 mm to 2 mm, is required to provide sufficient adhesive bonding for the chip and the die pad.
However, the adhesive material
102
often exceeds the edges of the chip. Due to surface tension, the adhesive material
102
will flow along the sides
112
of the chip
104
to its top surface, such as an active surface
114
, of the chip
104
. As a result, the active surface of the chip is polluted by the adhesive material. With the development of the semiconductor package, the size of the chip has been decreasing. Because of the decrease in the size of the chip, the pollution problem on the active surface of the chip is even more serious. Therefore, a packaging method is needed to prevent the active surface of the chip from being polluted.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a chip with beveled edges, which is suitable for adhering onto a die pad by an adhesive material. The chip with beveled edges comprises an active surface and a back surface, wherein the edges of the active surface are beveled. The back surface of the chip is adhered onto the surface of the die pad with adhesive material. The adhesive material preferably covers the whole surface of the chip is in a range of 30° to 60°, but is preferably 45°.
It is another object of the present invention to provide a package of a semiconductor device, which comprises a carrier, a chip, an adhesive material, wires and a molding compound. The carrier has a die pad and a plurality of leads. The chip has an active surface and a corresponding back surface, and the active surface has beveled surfaces on both of its edges. The back surface of the chip is covered with adhesive material, and both sides of the chip are covered with adhesive material. The wires electrically connect the leads of the carrier to the active surfaces of the chips. The molding compound covers the chips, wires and portions between the carrier and the chips in order to allow the chip to be isolated from the outside environment.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 6049124 (2000-04-01), Raiser et al.

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