Overerase correction for flash memory which limits overerase and

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518529, 365218, G11C 700

Patent

active

056423110

ABSTRACT:
An integrated circuit including an array of flash EEPROM memory cells wherein overerase correction is provided after application of each erase pulse.

REFERENCES:
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patent: 5347489 (1994-09-01), Merchant et al.
patent: 5359558 (1994-10-01), Chang et al.
patent: 5424993 (1995-06-01), Lee et al.
patent: 5508959 (1996-04-01), Lee et al.

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