Output stage for integrated circuits, particularly for electroni

Details Output stage for integrated circuits, particularly for electroni Output stage for integrated circuits, particularly for electroni

1996-05-17

1997-08-12

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518906, 327 52, G01R 1900

Patent

active

056572760

ABSTRACT:
An output stage for integrated circuits, particularly for electronic memories, including: an input section that is adapted to acquire an input datum; a latch circuit having a first output and a second output and connected to the input section; a first inverter connected to the second output; a second inverter connected to the first output; a third inverter connected to the output of the second inverter; a grounding transistor driven by the second output of the latch circuit and adapted to connect the output of the third inverter to the ground; and a push-pull stage driven by the output of the first and third inverters. The output stage according to the present invention furthermore includes: a shorting transistor adapted to connect the output of the first inverter to the output of the second inverter; a first enabling transistor interposed between the first inverter and the first output of the latch circuit; a second enabling transistor interposed between the second inverter and the second output of the latch circuit; and a section for charging and discharging the push-pull stage, which is adapted to rapidly discharge the gate of the first transistor of the push-pull stage and to charge the gate of the second transistor of the push-pull stage during their operation.

REFERENCES:
patent: 4250412 (1981-02-01), Kung et al.
patent: 5067109 (1991-11-01), Kim et al.
patent: 5481500 (1996-01-01), Reohr et al.
patent: 5508644 (1996-04-01), Branson et al.

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