Output driver having output current compensation and method...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S119000

Reexamination Certificate

active

06556049

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an output driver of a semiconductor memory device and a method of driving an output of a semiconductor device, and more particularly, to an output driver of an input/output (I/O) interface in a Rambus dynamic random access memory (RDRAM).
2. Description of the Related Art
The JC-16 Subcommittee under Joint Electronic Device Engineering Council (JEDEC) has approved a gunning transceiver logic (GTL) as a standard for an interface suitable for a synchronous DRAM (SDRAM). In a RDRAM having a bandwidth more than 1.6 gigabytes per second, a Rambus signaling logic (RSL) is used as an interface. In high-speed data transmission, to reduce emission of electromagnetic interference (EMI), a swing of an output voltage needs to be reduced as much as possible.
FIG. 1
is a block diagram of a memory interface of a conventional RDRAM. Referring to
FIG. 1
, an I/O interface includes a control master
10
, RDRAMs
11
,
13
,
15
, and
17
, transmission lines
1
,
3
,
5
,
7
, and
9
, an end resistor Rterm, and a terminal voltage Vterm. Each RDRAM
11
,
13
,
15
, or
17
includes an output driver
19
, a receiver
18
, and an input/output terminal
16
for the receiver
18
and the output driver
19
.
FIG. 2
is a schematic diagram of the open drain output driver of
FIG. 1
including a current source. Referring to
FIG. 2
, the conventional open drain output driver
19
includes one or more current sources connected in parallel to the output terminal
16
. In this case, for convenience of explanation, only the last current source will be described. The output driver
19
controls a swing of an output voltage of the output terminal
16
using the NMOS current source consisting of NMOS transistors M
1
and M
2
. The operation of the output driver
19
in the I/O interface, in which the plurality of RDRAMs
11
,
13
,
15
, and
17
are coupled to the transmission lines
1
,
3
,
5
,
7
, and
9
, will now be described with reference to
FIGS. 1 and 2
. If the NMOS transistor M
2
operates in a saturation region by a predetermined reference signal Vg, then current flowing through the NMOS transistor M
2
as a current source maintains a constant value. Thus, a voltage Vout of the output terminal
16
has a swing by data DAT
1
input to the gate of the NMOS transistor M
1
.
The output driver
19
drives data having a value “1” or data having a value “0” to the single-terminated transmission lines
1
,
3
,
5
,
7
, and
9
, according to the data DAT
1
. If the output driver
19
drives the transmission lines
1
,
3
,
5
,
7
, and
9
, the output voltage Vout of the output terminal
16
may be reduced compared to a normal output voltage level by overlapping previous data and current data due to propagation delay on the transmission lines. If the output voltage Vout of the output terminal
16
is reduced and the NMOS transistor M
2
operates in a linear region instead of a saturation region, current flowing through the NMOS transistor M
2
from the output terminal
16
is reduced.
Consequently, if the output voltage Vout of the output driver
19
decreases, the current flowing at the output terminal
16
becomes smaller. Thus, overlapping of voltages at the transmission lines
1
,
3
,
5
,
7
, and
9
of the memory interface may hamper correct data sampling.
SUMMARY OF THE INVENTION
The present invention is therefore directed to an output driver, and a method of driving an output, which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
To solve the above problems, it is an objective of the present invention to provide an output driver, and a method of driving an output, for supplying constant output current independently of changes in an output voltage.
Accordingly, to achieve the above objectives, the present invention provides an output driver including a current source for regulating changes in a voltage of an output terminal in response to a reference signal, and an output current compensating circuit which responds to the current source in order to supply constant current to the output terminal.
The current source includes a first metal-oxide-semiconductor (MOS) transistor having a drain coupled to the output terminal and a gate to which the reference signal is input, and a second MOS transistor having a drain coupled to a source of the first MOS transistor, a gate to which data is input, and a source coupled to a ground voltage. For example, the current source may be an open drain current source. The output current compensating circuit includes a current compensating unit coupled to the output terminal, and a sensing driving unit for sensing voltage changes of the output terminal and driving the current compensating unit.
The above objectives may also be achieved by providing a method of driving an output including providing a current to an output terminal responsive to a reference signal, so that a voltage is realized at the output terminal; monitoring the voltage at the output terminal to provide a control signal; and maintaining the current provided to the output terminal constant responsive to the control signal.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.


REFERENCES:
patent: 5023488 (1991-06-01), Gunning
patent: 5606275 (1997-02-01), Farhang et al.
patent: 6144218 (2000-11-01), Smith et al.
patent: 0 718 744 (1996-06-01), None
patent: 407074612 (1995-03-01), None

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