Output driver and output driving method for enhancing...

Details Output driver and output driving method for enhancing... Output driver and output driving method for enhancing...

2008-05-06

2008-05-06

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S086000, C375S348000

Reexamination Certificate

active

07368949

ABSTRACT:
An output driver for enhancing initial output data using timing includes a selection signal generation unit for generating a selection signal, a reference data generation unit for generating reference data, and a selection unit. The selection signal is activated at the transition point of the input data, generated after being maintained in a same logic state during a number of bit periods that is equal to or greater than a predetermined duration number. The reference data is delayed from the input data by a delay time shorter than one bit period. The selection unit is driven to transition the logic state of the output data depending on the transition of the logic state of any one of the input data and the reference data in response to the selection signal.

REFERENCES:
patent: 6064356 (2000-05-01), Shigeta
patent: 6185716 (2001-02-01), Riggle
patent: 7126394 (2006-10-01), Hargan
patent: 7277499 (2007-10-01), Wetzker
patent: 2003/0099310 (2003-05-01), Zvonar
patent: 2002-368600 (2002-12-01), None
patent: 2003-243940 (2003-09-01), None
patent: 2002-0083329 (2002-11-01), None
English Abstract for Publication No.: 1020020083329, filing date: Apr. 27, 2001, pub date: Nov. 2, 2002.
English Abstract for Publication No.: JP2002368600, pub date: Dec. 20, 2002.
English Abstract for Publication No.: JP2003243940, pub date: Aug. 29, 2003.

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