Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
2000-03-20
2000-12-19
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36518911, G11C 700
Patent
active
061634867
ABSTRACT:
An output circuit of a semiconductor memory device is made up of a level recognition circuit which outputs a feedback signal by comparing an output node and a second reference voltage, and a P-channel MOS transistor and an N-channel MOS transistor which complimentary turn on and off in response to the feedback signal. As a result, when a charge of the output node is not sufficient, the output node is charged by setting a voltage of a power supply node to a power supply voltage Vcc. Then, when the output node is sufficiently charged, the N-channel MOS transistor turns on, and as a result the voltage of the power supply node is set to a first reference voltage. Accordingly, the output circuit of the semiconductor memory device achieves an increased operation speed and decreased voltage level amplitude at the output node.
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Nguyen Tan T.
OKI Electric Industry Co., Ltd.
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