Output buffer in which inductive noise is suppressed

Details Output buffer in which inductive noise is suppressed Output buffer in which inductive noise is suppressed

1984-11-28

1987-04-28

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365206, 307575, G11C 700

Patent

active

046619283

ABSTRACT:
An output buffer used in, for example, a semiconductor memory device, comprises a first transistor connected between a power potential supply terminal and a data output terminal and a second transistor connected between a reference potential supply terminal and the data output terminal. In response to the data stored in a selected memory cell, either one of the first and second transistors is turned ON to change the potential at the data output terminal to a level corresponding to the data at a first rate. The output buffer further comprises a third transistor connected between the gate of the second transistor and the power potential supply terminal. The third transistor is turned ON before the data stored in the selected memory cell is supplied to the output buffer to vary the potential at the data output terminal to the reference potential at a second rate smaller than the first rate.

REFERENCES:
patent: 4397000 (1983-08-01), Nagami
Japanese Laid-open application No. 57-167197, Oct. 14, 1982.

Affiliated with

Also associated with

Rating

Output buffer in which inductive noise is suppressed does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Output buffer in which inductive noise is suppressed, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output buffer in which inductive noise is suppressed will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-480922