Output buffer circuit for a semiconductor memory device

Details Output buffer circuit for a semiconductor memory device Output buffer circuit for a semiconductor memory device

1988-05-18

1989-01-31

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, G11C 700

Patent

active

048021270

ABSTRACT:
A semiconductor memory device of multi-bit type which produces plural output signals corresponding to read-out data from one address at a time including memory device for storing data. In a plurality of output buffer stages for producing the output signals, the operation of the output buffer stages is based upon at least a timing signal. A device for operating the output buffer stages have predetermined time differences. The output signals having predetermined time differences are delivered from the output buffer stages.

REFERENCES:
patent: 4532613 (1985-07-01), Takemae et al.
patent: 4583204 (1986-04-01), Takemae et al.
patent: 4661928 (1987-04-01), Yasuoka

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