Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2007-10-09
2007-10-09
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S100000, C365S189110
Reexamination Certificate
active
10721310
ABSTRACT:
An output buffer circuit of the present invention includes a plurality of unit circuits in each of which a pull-up transistor controlled by a first input signal is connected between a high-potential power supply and common node, and a pull-down transistor controlled by a second input signal is connected between the common node and a low-potential power supply, an output terminal connected to a common connecting point of the common nodes of the plurality of unit circuits, and first resistors formed respectively between the common nodes of the plurality of unit circuits and the common connecting point.
REFERENCES:
patent: 4885485 (1989-12-01), Leake et al.
patent: 5099148 (1992-03-01), McClure et al.
patent: 5355029 (1994-10-01), Houghton et al.
patent: 5517142 (1996-05-01), Jang et al.
patent: 5804987 (1998-09-01), Ogawa et al.
patent: 6041013 (2000-03-01), Kohno
patent: 6097237 (2000-08-01), Singh
patent: 6121789 (2000-09-01), Liu et al.
patent: 6204692 (2001-03-01), Nakagawa
patent: 6366114 (2002-04-01), Liu et al.
patent: 6384621 (2002-05-01), Gibbs et al.
patent: 6737886 (2004-05-01), Curatolo et al.
patent: 6812734 (2004-11-01), Shumarayev et al.
patent: 2002/0030517 (2002-03-01), Kurisu et al.
patent: 06-224731 (1994-08-01), None
patent: 09-018326 (1997-01-01), None
patent: 10-107607 (1998-04-01), None
patent: 11-025678 (1999-01-01), None
patent: 2000-022516 (2000-01-01), None
patent: 2001-352238 (2001-12-01), None
Japanese Office Action for Patent Application No. 344926/2002, issued Aug. 4, 2006 with English translation.
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Le Thong Q.
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