Optimizations of a perform frame management function issued...

Details Optimizations of a perform frame management function issued... Optimizations of a perform frame management function issued...

2008-02-25

2011-12-27

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S006000

Reexamination Certificate

active

08086811

ABSTRACT:
Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.

REFERENCES:
patent: 4972338 (1990-11-01), Crawford et al.
patent: 4992936 (1991-02-01), Katada et al.
patent: 5058003 (1991-10-01), White
patent: 5551013 (1996-08-01), Beausoleil et al.
patent: 5574873 (1996-11-01), Davidian
patent: 5617554 (1997-04-01), Alpert et al.
patent: 5790825 (1998-08-01), Traut
patent: 5845331 (1998-12-01), Carter et al.
patent: 6009261 (1999-12-01), Scalzi et al.
patent: 6308255 (2001-10-01), Gorishek, IV et al.
patent: 6418522 (2002-07-01), Gaertner et al.
patent: 6463582 (2002-10-01), Lethin et al.
patent: 6574706 (2003-06-01), Sutherland et al.
patent: 7120746 (2006-10-01), Campbell et al.
patent: 7197601 (2007-03-01), Slegel et al.
patent: 7234037 (2007-06-01), Errickson et al.
patent: 2002/0120807 (2002-08-01), Sutherland et al.
patent: 2002/0120808 (2002-08-01), Dyck et al.
patent: 2002/0129085 (2002-09-01), Kubala et al.
patent: 2003/0056082 (2003-03-01), Maxfield
patent: 2004/0024953 (2004-02-01), Babaian et al.
patent: 2004/0098719 (2004-05-01), Smith et al.
patent: 2004/0023075 (2004-11-01), Slegel et al.
patent: 2004/0230768 (2004-11-01), Slegel et al.
patent: 2004/0230976 (2004-11-01), Slegel et al.
patent: 2005/0268071 (2005-12-01), Blandy et al.
patent: 2005/0289246 (2005-12-01), Easton et al.
patent: 2006/0036824 (2006-02-01), Greiner et al.
patent: 2007/0016904 (2007-01-01), Adlung et al.
patent: 2007/0028072 (2007-02-01), Hennessy et al.
patent: 2007/0124557 (2007-05-01), Kanai
patent: 2009/0182964 (2009-07-01), Greiner et al.
patent: 2009/0182966 (2009-07-01), Greiner et al.
patent: 2009/0182971 (2009-07-01), Greiner et al.
patent: 2009/0182972 (2009-07-01), Greiner et al.
patent: 2009/0182973 (2009-07-01), Greiner et al.
patent: 2009/0182974 (2009-07-01), Greiner et al.
patent: 2009/0182975 (2009-07-01), Greiner et al.
patent: 2009/0187724 (2009-07-01), Greiner et al.
patent: 2009/0187728 (2009-07-01), Greiner et al.
patent: 2009/0187732 (2009-07-01), Greiner et al.
patent: 2009/0193214 (2009-07-01), Greiner et al.
patent: 2009/0216992 (2009-08-01), Greiner et al.
patent: 2010/0325454 (2010-12-01), Parthasarathy
patent: 2414842 (2005-07-01), None
Office Action for U.S. Appl. No. 11/972,713 dated Oct. 28, 2010, pp. 1-20.
Office Action for U.S. Appl. No. 11/972,718 dated Dec. 27, 2010, pp. 1-18.
Office Action for U.S. Appl. No. 11/972,725 dated Jan. 5, 2011, pp. 1-18.
“z/Architecture—Principles of Operation,” International Business Machines Corporation, SA22-7832-05, 6th Edition, Apr. 2007, pp. 1-1028.
“z/VM—Running Guest Operating Systems,” International Business Machines Corporation, SC24-5997-02, Third Edition, May 2002, pp. 1-179.
“z/VM—General Information,” International Business Machines Corporation, GC24-5991-04, Fifth Edition, Apr. 2002, pp. 1-119.
“System/370 Extended Architecture/Interpretive Execution,” International Business Machines Corporation, SA22-7095-01, Sep. 1985, pp. 1-32.
“IBM System/370 Extended Architecture, Principles of Operation,” Publication No. SA22-7085-1, second Edition, Jan. 1987, 584 pages.
“IBM Power ISA, Version 2.03,” Sep. 2006, 850 pages.
The SPARC Architecture Manual, Version 9, 1994 SPARC International Inc., San Jose, CA, SAV09R1459912, ISBN: 0-13-825001-4, 399 pages.
Intel 64 and IA-32 Architectures Software Developer's Manual, vol. 3A: System Programming Guide, Part 1, 253668-036US, Sep. 2010, 842 pages, http://intel.com/Assets/PDF/manual/253668.pdf.
Marc et al., “Programmed Storage Utilization Measurement Technique,” Technical Disclosure Bulletin, Jun. 1973, pp. 65-66.
Breslau, et al., “Storage Key Protection at Object Level,” IBM Technical Disclosure Bulletin, vol. 38, No. 12, Dec. 1995, p. 339.
Larner, et al., “Channel DAT and Page Pinning for Block Unit Transfers,” IBM Technical Disclosure Bulletin, vol. 23, No. 2, Jul. 1980, pp. 704-705.
International Search Report and Written Opinion for PCT/EP2009/050048 dated Jul. 5, 2009, pp. 1-10.
International Search Report and Written Opinion for PCT/EP2009/050049 dated Jul. 5, 2009, pp. 1-10.
International Search Report and Written Opinion for PCT/EP2009/050050 dated Jul. 5, 2009, pp. 1-10.
International Search Report and Written Opinion for PCT/EP2009/050051 dated Apr. 22, 2009, pp. 1-12.
International Search Report and Written Opinion for PCT/EP2009/050052 dated Aug. 5, 2009, pp. 1-11.
International Search Report and Written Opinion for PCT/EP2009/050227 dated Jul. 5, 2009, pp. 1-11.
International Search Report and Written Opinion for PCT/EP2009/051864 dated Aug. 6, 2009, pp. 1-9.

Affiliated with

Also associated with

Rating

Optimizations of a perform frame management function issued... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Optimizations of a perform frame management function issued..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optimizations of a perform frame management function issued... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4312929