Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2002-09-20
2004-10-12
Cuneo, Kamand (Department: 2829)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S795000
Reexamination Certificate
active
06803297
ABSTRACT:
The present application relates to semiconductor processing technologies, and particularly to a method of annealing semiconductor wafers with rapid thermal processing.
BACKGROUND OF THE INVENTION
In today's high speed semiconductor devices, ultra-shallow junctions, low sheet resistance and abrupt lateral junctions are vital to reduce short channel effects and to increase transistor saturation current in source drain extensions. Several techniques have been developed to deal with the issues associated with the formation of shallow, low sheet resistance junctions. Examples of these issues are transient enhanced diffusion (TED), solid solubility, and channeling, which can be resolved by using low energy implants and sharp spike anneals. During low energy implant processes, the implant energies are limited to about 1 keV or less. Thus, TED is minimized because defects caused by the implant processes are confined close to the surface. Sharp spike anneals following the implant processes provide high dopant activation and effective implant damage removal while minimizing dopant diffusion.
Spike anneal is typically performed by subjecting a semiconductor wafer or substrate having implanted dopants to temperature treatment in a rapid thermal processing (RTP) system. A typical annealing profile using RTP involves ramping up to a target temperature, e.g. 1050° C., soaking the wafer at the target temperature for a period of time (soak time), and ramping down to a base temperature, e.g. 200° C. For spike anneal, high ramp rates, e.g., 75° C./sec or higher, and short (~1 sec) or no soak time are desired to prevent excessive dopant diffusion. Besides the tight temperature control requirement, gas composition in the annealing ambient may also need to be controlled. For example, the presence of oxygen has been found to be necessary in order to decrease the evaporation or out-diffusion of implanted dopants such as boron and arsenic, but too much oxygen in the annealing ambient results in oxygen enhanced diffusion (OED). OED has been found to be a limiting factor for the creation of shallow junctions, particularly when dopants such as boron are used.
Conventional spike anneal processes are typically performed at an ambient gas pressure that is comparable to atmospheric pressure. The oxygen concentration in these processes can not be accurately and dynamically controlled, due partly to the long response time for the oxygen concentration to adjust to a desired concentration level in these processes. At around atmospheric pressure, this response time may be comparable with the time a spike anneal process typically takes. For example, in a spike anneal process disclosed in U.S. Pat. No. 6,087,247, oxygen concentration has to be adjusted and stabilized before thermal processing of each wafer by first purging the RTP chamber with a process gas until the oxygen concentration in the chamber is below a threshold, and then introducing oxygen into the chamber at a controlled level. At atmospheric pressure, this process of obtaining desired oxygen concentration in an RTP chamber before thermal processing of each wafer is time consuming and can become a wafer fabrication bottleneck.
SUMMARY OF THE INVENTION
The present invention includes a process of annealing semiconductor substrates with rapid thermal processing, in which gas pressure and gas composition in an annealing ambient is actively and dynamically controlled during thermal processing of the semiconductor substrates. In one embodiment of the present invention, a method for activating implanted dopants in a semiconductor substrate to form shallow junctions comprises placing the substrate in a thermal processing chamber and subjecting the substrate to a temperature treatment process (or thermal process) which includes a plurality of temperature ramp phases. The chamber pressure is maintained at a level lower than about 300 Torr by a closed-loop pressure control system, and a pump system is used to accelerate gas exchanges in the chamber. A transfer chamber is provided so that substrates can be transferred in and out of the processing chamber without increasing the chamber pressure and substantially changing the gas composition in the chamber. Oxygen is introduced during all or part of the thermal process, such as a fast-ramp phase of the thermal process in which substrate temperature is ramped up rapidly to a peak temperature. A volumetric flow rate at which oxygen is introduced into the processing chamber is selected such that the oxygen concentration in the processing chamber reaches a level within a range of 1500-75000 ppm before the substrate reaches the peak temperature. The volumetric flow rate of oxygen may be controlled by a closed-loop fluid control system that adjusts the volumetric flow rate of oxygen according to an oxygen concentration set point. The low gas pressure in the annealing ambient provides much faster response time in adjusting gas compositions in the annealing ambient and allows dynamic control of the gas compositions in the annealing ambient during thermal processing of the semiconductor substrates.
REFERENCES:
patent: 6087247 (2000-07-01), Downey
patent: 6100149 (2000-08-01), Nenyei et al.
patent: 2001/0031544 (2001-10-01), Matsuda
patent: 2003/0186554 (2003-10-01), Tam et al.
patent: 2004/0058560 (2004-03-01), Ranish et al.
Heide et al., Proceeding of Ion Implantation Technology Conference, 2000, pp. 678-681, Conference Editors: H. Ryssel, L. Frey, J. Gyulai, H. Glawisching.
Jennings Dean
Tallavarjula Sairaju
Thakur Randhir
Applied Materials Inc.
Cuneo Kamand
Guenzer, Esq. Charles S.
Kilday Lisa
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