One-time programmable latch which allows volatile writes prior t

Static information storage and retrieval – Systems using particular element – Flip-flop

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365156, 36518507, 36518508, G11C 1100

Patent

active

058569413

ABSTRACT:
A cross-coupled latch circuit that is a one-time programmable latch that allows volatile temporary writes to the latch prior to permanent programming of the latch. The latch circuit includes first and second programmable FET devices that include poly-poly capacitators in series with the gate terminal of each device. A pair of PMOS FET devices combine with the programmable devices to make up the latch. The latch circuit includes other FET devices that are switched on and off depending on whether the latch is being permanently programmed, temporarily written to, or reset. A NAND gate is provided such that a logical high output on the NAND gate allows the first programmable device to be temporarily programmed with a logical one and permanently programmed with a logical zero. A NOR gate is provided such that a logical high on the NOR gate allows the second programmable device to be temporarily programmed with a logical zero and permanently programmed with a logical one.

REFERENCES:
patent: 4128773 (1978-12-01), Troutman et al.
patent: 4132904 (1979-01-01), Harari
patent: 4348745 (1982-09-01), Schmitz
patent: 5523971 (1996-06-01), Rao
patent: 5606523 (1997-02-01), Mirabel
patent: 5648885 (1997-07-01), Matsuo et al.
patent: 5648930 (1997-07-01), Randazzo

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