One-chip microcomputer capable of internally producing ECC data

Details One-chip microcomputer capable of internally producing ECC data One-chip microcomputer capable of internally producing ECC data

1999-04-06

2003-08-05

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C365S185330

Reexamination Certificate

active

06604214

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is generally related to an one-chip microcomputer capable of internally producing ECC data to add the ECC data to user data. More specifically, the present invention is directed to such an one-chip microcomputer capable of reducing a work load of a user, and also capable of reducing a memory capacity without increasing EEPROM write time based upon the ECC data.
2. Description of the Related Art
EEPROMs (electrically erasable programmable read-only memories) are such memories capable of erasing and/or writing data (including flash EEPROMs), and are usually employed in one-chip microcomputers and the like capable of storing programs. To increase reliability of data saved in EEPROMs, the following error correction method is effectively utilized. That is, while ECC (error correction code) data is added to user data and then the resulting user data added with the ECC data is stored, the error correction is carried out by using the ECC data with respect to the read user data. Conventionally, such an ECC data adding operation is carried out in such a manner that while the ECC data is produced from the user data by using the dedicated software, the produced ECC data is stored into the EEPROM in combination with the user data.
For example, a one-chip microcomputer used to control an engine of an automobile executes such an important control, for example, an engine revolution number control and a fuel injection control based upon a control program. In the case that a storage content of a ROM (read-only memory) for previously storing this control program is changed, this one-chip microcomputer executes an abnormal process operation, resulting in a dangerous condition. As a consequence, when a user stores use data (program and the like) into the ROM, the ECC data is additionally stored in this ROM. When the one-chip microcomputer reads out the user data, if one bit error occurs, then this one-chip microcomputer may correct this 1 bit error, and also if more than 2-bit error occurs, then this one-chip microcomputer may indicate “abnormal” conditions.
Furthermore, when a bug is found in user data (computer program) previously stored in a ROM, an automobile manufacturer should recall sold automobiles so as to replace the defective one-chip microcomputers by properly set one-chip microcomputers. In the bug case, this automobile manufacturer is required to replace an engine control assembly containing a defective one-chip microcomputer when a ROM is arranged by a rewritable ROM such as a mask ROM. In this rewritable ROM case, not only the cost of this engine control assembly, but also the replacement cost are necessarily required. As a result, this automobile manufacturer should accept a large amount of loss. Under such a circumstance, if a ROM of a one-chip microcomputer is arranged by an EEPROM, then the automobile manufacturer is merely required to rewrite a program saved in this EEPROM via a connector of this one-chip microcomputer, so that a total cost of solving the bug problem can be reduced.
FIG. 20
is an explanatory diagram for explaining one conventional ECC data producing/adding method executed in an EEPROM. Now, this conventional ECC data producing/adding method will be explained with reference to FIG.
20
.
First, a user forms a predetermined program (step
101
of FIG.
20
(
a
)) so as to produce ECC data. It is now assumed that as user data
102
, data defined from 00000H up to 0FFFFH are inputted. The user produces the ECC data based the user data
102
by employing exclusively-used software in accordance with the formed program (step
103
in FIG.
20
(
a
)). As a result, data defined from 10000H up to 14FFFH are produced as the ECC data
104
. Next, the ECC data
104
is added to the user data
102
so as to produce data defined from 00000H up to 14FFFH as write data
105
, and then these produced write data are written into an EEPROM built in a microcomputer (not shown) (step
106
in FIG.
20
(
a
)). In this case, the write data
105
are written by way of an exclusively-used data writer, or an on-board writing manner.
FIG.
20
(
b
) illustrates an address map on the EEPROM. In this address map, addresses from 00000H to 0FFFFH are allocated as the user data, and also addresses from 10000H to 14FFFH are allocated as the ECC data. A volume of ECC data requires 5 bits in the case of 16-bit data. As a result, a data region as shown in FIG.
20
(
b
) is required.
However, in the above-described conventional ECC data producing/adding method, since the ECC data is produced and the user data is separately processed, there is a problem that the exclusively used software capable of producing the ECC data based upon the user data is required.
Also, since the ECC data is mapped at the addresses after the user data, the data defined from 10000H up to 14FFFH are written as the ECC data in addition to the user data defined from 00000H up to 0FFFFH. As a result, there is another problem that the data writing time would be increased by approximately 30 percents.
Furthermore, since the entire data amount of write data is increased by approximately 30 percents because of the employment of these ECC data, there is a further problem that the total memory capacity of the external memory of the entire system must be increased by approximately 30 percents.
On the other hand, conventionally, one conventional technical idea has been proposed such that the ECC data producing circuit constituted by employing the logic circuits is built in the one-chip microcomputer. Very recently, bitwidths of data buses employed in one-chip microcomputers are increased more and more. That is, although the conventional data buses own bitwidths of 8 bits, the current data buses own bitwidth of 32 bits, or 64 bits. Under such a wide bitwidth trend condition, when a ECC data producing circuit is arranged by logic circuits, an entire circuit scale would be increased in an exponential manner in connection with a increase of such a bitwidth of a data bus. Therefore, an area occupied by this ECC data producing circuit with respect to a semiconductor chip would be necessarily increased.
In the case that an EEPROM is employed so as to store thereinto a program used in an one-chip microcomputer, a ECC data producing circuit is used only when this computer program is stored, but not used when this computer program is executed. Nevertheless, such a technical idea that the ECC data producing circuit having the large circuit scale is built in the one-chip microprocessor would cause the cost effective performance characteristic of this one-chip microcomputer to be deteriorated.
SUMMARY OF THE INVENTION
In view of the above-described problems, it is an object of the present invention to provide a one-chip microcomputer capable of internally producing ECC data.
It is another object of the present invention to provide a one-chip microcomputer capable of reducing a workload given to a user, and further capable of reducing a necessary capacity of a memory without increasing ECC data writing time of an EEPROM.
According to a first aspect of the present invention, there is provided a microcomputer comprising:
an electrically erasable memory for temporarily storing thereinto externally supplied user data and ECC (error correction code) data corresponding to the user data;
a program storage memory for previously storing thereinto a program; and
a CPU (central processing unit) for reading the program from the program storage memory so as to produce the ECC data based upon the externally supplied user data, and for sequentially correcting errors contained in the externally supplied user data by using the produced ECC data corresponding to the externally supplied user data.
In the foregoing, it is desirable that, when the externally supplied user data contains a 1-bit error, the CPU corrects the 1-bit error based on the produced ECC data read from the electrically erasable memory, whereas when the externally supplied user data contains more than 2-bit errors, the CPU

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