On-pad broadband matching network

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257SE21575

Reexamination Certificate

active

10905624

ABSTRACT:
A chip is provided in which an on-chip matching network has a first terminal conductively connected to a bond pad of the chip and a second terminal conductively connected to a common node on the chip. A wiring trace connects the on-chip matching network to a circuit of the chip. The on-chip matching network includes an electrostatic discharge protection (ESD) circuit having at least one diode having a first terminal conductively connected to the bond pad and a second terminal connected in an overvoltage discharge path to a source of fixed potential. The matching network further includes a first inductor coupled to provide a first inductive path between the bond pad and the wiring trace, a termination resistor having a first terminal connected to the common node, and a second inductor coupled to provide a second inductive path between the wiring trace and a second terminal of the termination resistor.

REFERENCES:
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patent: 2003/0122620 (2003-07-01), Burns et al.
patent: 2004/0089951 (2004-05-01), Lin
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