On-chip stuck-at fault detector and detection method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S733000

Reexamination Certificate

active

07865790

ABSTRACT:
An on-chip stuck-at fault detector in an integrated circuit using a test circuit for critical path testing can include a sequence circuit having a first sequential circuit and a second sequential circuit to sensitize the critical path between a source sequential circuit and a destination sequential circuit, an analyzer circuit for capturing an output from the destination sequential circuit and comparing a signal between the destination sequential circuit and the analyzer circuit at predetermined clock cycles, and a controller for strobing the analyzer circuit at the predetermined clock cycles. The first sequence and second circuits can both be initialized to a zero mode (e.g., x=0 and y=0). Thus, no stuck-at faults are determined if the destination sequential circuit and an analyzer sequential circuit in the analyzer circuit have different values and a zero result is captured at a sticky-bit flip flop.

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U.S. Appl. No. 12/043,833, filed Mar. 6, 2008, Jairam et al.
U.S. Appl. No. 11/498,368, filed Aug. 3, 2006, Jairam et al.

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