Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2008-06-10
2008-06-10
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S718000, C714S722000, C365S201000
Reexamination Certificate
active
07386769
ABSTRACT:
On chip diagnosis method and on chip diagnosis block with mixed redundancy (IO redundancy and word-register redundancy) is provided. During a BIST (Built-In Self Test), information needed to apply redundancy resources is stored inside two arrays (fill_array, shift_array) on chip. A final diagnosis may apply redundancy resources based on this stored information. The first array (fill_array) is used to keep a minimum error mapping and the second array (shift_array) is used to control the fill of the first array.
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Collura Michel
Jallamion-Grive Yannis
Vial Jean-Christophe
Infineon - Technologies AG
Louis-Jacques Jacques
Patterson & Sheridan L.L.P.
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