4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Replacement of memory spare location, portion, or segment

Michel Collura

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Fuse blowing interface for a memory chip

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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On chip diagnosis block with mixed redundancy

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2425189

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