On-chip communication circuit and protocol for microcontroller-b

Details On-chip communication circuit and protocol for microcontroller-b On-chip communication circuit and protocol for microcontroller-b

1998-06-08

2000-09-12

De Cady, Albert

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

710 27, 710 52, G06F 1200

Patent

active

061191752

ABSTRACT:
A communications unit configured to be implemented in an ASIC environment utilizes only a small amount of chip surface area and requires a minimum number of pins. The unit operates asynchronously with respect to the ASIC internal clock so that communications can occur independent of such internal clock. In one embodiment the communications unit includes a controller coupled to a shift register via a data bus. Pin connections to the controller include a request line REQ, an input/output control line I/O (or INOUT), an acknowledgement line ACK, an external clock line EXTCLK, and a data line DATA. The shift register also is coupled, via a data bus, to a memory module, e.g., a RAM. An ASIC processor is coupled to the controller, shift register and memory module via control lines.

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