Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-04-01
2008-04-01
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S025000, C714S030000, C714S724000, C714S718000, C714S734000, C714S737000, C714S742000, C365S201000
Reexamination Certificate
active
07353442
ABSTRACT:
An on-chip and at-speed tester for testing and characterization of different types of memories in an integrated circuit device, comprising a Centralized Flow Controller for automatically controlling the test operations for selected test programs, and Localized Signal Generators located inside each memory block and controlled by said Centralized Flow Controller for applying specified test patterns on the associated memory array.
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Bahl Swapnil
Singh Balwant
STMicroelectronics Pvt. Ltd.
Trimmings John P
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