Etching a substrate: processes – Gas phase etching of substrate – Application of energy to the gaseous etchant or to the...
Reexamination Certificate
2005-06-14
2005-06-14
Ahmed, Shamim (Department: 1765)
Etching a substrate: processes
Gas phase etching of substrate
Application of energy to the gaseous etchant or to the...
C216S037000, C216S068000, C216S069000, C438S706000, C438S710000, C438S733000, C438S739000
Reexamination Certificate
active
06905626
ABSTRACT:
A method of preventing notching during a cyclical etching and deposition of a substrate with an inductively coupled plasma source is provided by the present invention. In accordance with the method, the inductively coupled plasma source is pulsed to prevent charge build up on the substrate. The off state of the inductively coupled plasma source is selected to be long enough that charge bleed off can occur, but not so long that reduced etch rates result due to a low duty cycle. The pulsing may be controlled such that it only occurs when the substrate is etched such that an insulating layer is exposed. A bias voltage may also be provided to the insulating layer and the bias voltage may be pulsed in phase or out of phase with the pulsing of the inductively coupled plasma source.
REFERENCES:
patent: 4500563 (1985-02-01), Ellenberger et al.
patent: 4985114 (1991-01-01), Okudaira et al.
patent: 5435886 (1995-07-01), Fujiwara et al.
patent: 5468341 (1995-11-01), Samukawa
patent: 5501893 (1996-03-01), Laermer et al.
patent: 5683538 (1997-11-01), O'Neill et al.
patent: 5770097 (1998-06-01), O'Neill et al.
patent: 5983828 (1999-11-01), Savas
patent: 6051503 (2000-04-01), Bhardwaj et al.
patent: 6071822 (2000-06-01), Donohue et al.
patent: 6129806 (2000-10-01), Kaji et al.
patent: 6187685 (2001-02-01), Hopkins et al.
patent: 6214162 (2001-04-01), Koshimizu
patent: 6231777 (2001-05-01), Kofuji et al.
patent: 6253704 (2001-07-01), Savas
patent: 6255221 (2001-07-01), Hudson et al.
patent: 6319355 (2001-11-01), Holland
patent: 6332425 (2001-12-01), Kofuji et al.
patent: 6372654 (2002-04-01), Tokashiki
patent: 6395641 (2002-05-01), Savas
patent: 6471821 (2002-10-01), Ogino et al.
patent: 2002/0066537 (2002-06-01), Ogino et al.
patent: 2002/0079058 (2002-06-01), Okumura et al.
patent: 2002/0114897 (2002-08-01), Sumiya et al.
patent: 2002/0115301 (2002-08-01), Savas
patent: 2002/0153101 (2002-10-01), Nguyen et al.
patent: 06061182 (1994-03-01), None
patent: 11026433 (1999-01-01), None
patent: 11102895 (1999-04-01), None
patent: 11219938 (1999-10-01), None
patent: 200294540 (2000-10-01), None
Johnson David
Lai Shouliang
Westerman Russell
Ahmed Shamim
Holland & Knight LLP
Unaxis USA Inc.
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