NOR-type flash memory device and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S261000, C438S262000, C257S333000, C257SE21620

Reexamination Certificate

active

07435647

ABSTRACT:
A flash memory device that has a structure capable of preventing gate stack damage, and a method of manufacturing the same, is presented. The method includes forming a first photo resist pattern to open a common source region on a substrate where a shallow trench isolation region, a tunnel oxide layer, and a gate stack including a floating gate, a dielectric layer and a control gate are formed, removing an insulating layer in the shallow trench isolation region with using the first photo resist pattern as a mask, and removing the first photo resist pattern. The method further includes depositing a buffer oxide layer on surface of the substrate to cover the gate stack and the common source region, forming a second photo resist pattern on surface of the substrate including the buffer oxide layer to open the common source region, and injecting dopants to the common source region by using the second photo resist pattern as a mask.

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patent: 2005/0199946 (2005-09-01), Hata et al.

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