Nonvolatile semiconductor memory which is connectable to a DRAM

Details Nonvolatile semiconductor memory which is connectable to a DRAM Nonvolatile semiconductor memory which is connectable to a DRAM

1996-04-26

1998-04-07

Dinh, Son T.

Static information storage and retrieval

Interconnection arrangements

365 51, G11C 502

Patent

active

057372586

ABSTRACT:
An electrically erasable and programmable nonvolatile memory device (EEPROM) such as a flash memory, is pin compatible with a dynamic random access memory device (DRAM), such that flash memory may be connected to a DRAM bus. Preferably, the flash memory is read and write timing-compatible with the DRAM read and write signals and is also preferably block read and block write timing compatible with DRAM block read and block write signals. The flash memory accepts signals to perform sleep and erase functions from signal lines of a DRAM bus which are not used by a DRAM. In order to perform a block erase, which is a characteristic of flash memory, the device preferably accepts an instruction to perform a block erase from signal lines of a DRAM bus which are not used by a DRAM and a block address for the block erase from the most significant bit address lines of the DRAM bus.

REFERENCES:
patent: 5089993 (1992-02-01), Neal et al.
patent: 5161124 (1992-11-01), Love
patent: 5349552 (1994-09-01), Zampaglione
patent: 5544096 (1996-08-01), Takasugi

Affiliated with

Also associated with

Rating

Nonvolatile semiconductor memory which is connectable to a DRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nonvolatile semiconductor memory which is connectable to a DRAM , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory which is connectable to a DRAM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-19772