Static information storage and retrieval – Read/write circuit – Precharge
Patent
1988-02-10
1989-08-15
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Precharge
36518901, 365222, G11C 1300
Patent
active
048581941
ABSTRACT:
A nonvolatile semiconductor memory device comprises memory cells each formed of a single memory transistor and can be accessed in a bit-by-bit manner to eliminate an erase cycle in a data write cycle. The memory device comprises precharging circuits for precharging word lines and bit lines in the data write cycle, tri-level V.sub.pp switches, in response to a data to be written and an output of X decoder, for applying to a selected word line a write voltage V.sub.pp when the data to be written is "1" while a ground potential when the data to be written is "0", and further applying remaining non-selected word lines the precharge voltage, and tri-level V.sub.pp switches, in response to a data to be written and an output of Y decoder, for applying to a selected bit line the ground potential when the data to be written is "1" while the write high-voltage V.sub.pp when the data to be written is "0", and further to the remaining non-selected bit lines the precharge voltage.
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Kobayashi Kazuo
Nakayama Takeshi
Terada Yasushi
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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