Nonvolatile semiconductor memory device having a small number of

Details Nonvolatile semiconductor memory device having a small number of Nonvolatile semiconductor memory device having a small number of

1994-12-20

1996-05-07

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Precharge

36518525, G11C 1300

Patent

active

055153275

ABSTRACT:
An EEPROM in which a select transistor to which any memory cell not selected is turned off to inhibit electron injections into the floating gate of the memory cell not selected. The memory cells of the EEPROM are arranged in rows and columns in a substrate. The memory cells forming each column are connected in series. The two endmost memory cells are connected to two select transistors, respectively. The bit lines are connected to a data latch/sense amplifier, which is connected to a column decoder. The column decoder controls the bit lines. A row decoder controls select gates and control gates. A voltage-boosting circuit generates a high voltage, which is applied to the substrate and the select gates to erase data in the EEPROM, and to the control gates to write data into the EEPROM. A low-voltage controller generates a low voltage, which is applied to the select gates for turning off the select transistors of the column not selected, thereby to prevent data-writing.

REFERENCES:
patent: 5388065 (1995-02-01), Yoneda

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