Nonvolatile semiconductor memory device and process of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S314000, C257S315000, C257S316000

Reexamination Certificate

active

06872614

ABSTRACT:
A nonvolatile semiconductor memory device featuring a reducing operating voltage while maintaining a good disturbance characteristic and high speed in a write operation, including a gate insulating film and gate electrode stacked on a channel forming region of a semiconductor provided on the surface of a substrate and planarly dispersed charge storing means such as carrier traps in a nitride film or near the interface with the top insulating film, provided in the gate insulating film, the gate insulating film including an FN tunnel film having a dielectric constant larger than that of a silicon oxide film and exhibiting an FN electroconductivity, whereby the thickness of the gate insulating film, converted to that of a silicon oxide film, can be reduced and the voltage can be reduced. Further, to reduce the operation voltage, a pull-up electrode is provided near the gate electrode through the dielectric film and a pull-up gate bias circuit supplying a predetermined voltage to the same and boost the gate electrode by capacity coupling.

REFERENCES:
patent: 5946240 (1999-08-01), Hisamune
patent: 6100560 (2000-08-01), Lovett
patent: 6232643 (2001-05-01), Forbes et al.
patent: 6351411 (2002-02-01), Forbes et al.
patent: 6486509 (2002-11-01), Van Houdt
patent: 6574144 (2003-06-01), Forbes
patent: 6583466 (2003-06-01), Lin et al.

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